| /external/strace/xlat/ |
| D | open_mode_flags.h | 97 #if defined(FTRUNC) || (defined(HAVE_DECL_FTRUNC) && HAVE_DECL_FTRUNC)
98 XLAT(FTRUNC),
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| D | open_mode_flags.in | 34 FTRUNC
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 517 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, enumerator
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| D | BasicTTIImpl.h | 660 ISD = ISD::FTRUNC; in getIntrinsicInstrCost()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCCTRLoops.cpp | 304 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break; in mightUseCTR()
366 Opcode = ISD::FTRUNC; break; in mightUseCTR()
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| D | PPCISelLowering.cpp | 139 setOperationAction(ISD::FTRUNC, MVT::ppcf128, Expand); in PPCTargetLowering()
198 setOperationAction(ISD::FTRUNC, MVT::f64, Legal); in PPCTargetLowering()
203 setOperationAction(ISD::FTRUNC, MVT::f32, Legal); in PPCTargetLowering()
467 setOperationAction(ISD::FTRUNC, VT, Expand); in PPCTargetLowering()
515 setOperationAction(ISD::FTRUNC, MVT::v4f32, Legal); in PPCTargetLowering()
574 setOperationAction(ISD::FTRUNC, MVT::v2f64, Legal); in PPCTargetLowering()
785 setOperationAction(ISD::FTRUNC, MVT::v4f64, Legal); in PPCTargetLowering()
790 setOperationAction(ISD::FTRUNC, MVT::v4f32, Legal); in PPCTargetLowering()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 91 setOperationAction(ISD::FTRUNC, MVT::f32, Legal); in AMDGPUTargetLowering()
209 setOperationAction(ISD::FTRUNC, MVT::f64, Custom); in AMDGPUTargetLowering()
353 setOperationAction(ISD::FTRUNC, VT, Expand); in AMDGPUTargetLowering()
627 case ISD::FTRUNC: return LowerFTRUNC(Op, DAG); in LowerOperation()
1049 return DAG.getNode(ISD::FTRUNC, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
1602 fq = DAG.getNode(ISD::FTRUNC, DL, FltVT, fq); in LowerDIVREM24()
1910 SDValue Floor = DAG.getNode(ISD::FTRUNC, SL, VT, Div); in LowerFREM()
1924 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src); in LowerFCEIL()
2044 SDValue T = DAG.getNode(ISD::FTRUNC, SL, MVT::f32, X); in LowerFROUND32()
2145 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src); in LowerFFLOOR()
[all …]
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| D | SIISelLowering.cpp | 245 setOperationAction(ISD::FTRUNC, MVT::f64, Legal); in SITargetLowering()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 162 case ISD::FTRUNC: return "ftrunc"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 105 case ISD::FTRUNC: R = SoftenFloatRes_FTRUNC(N); break; in SoftenFloatResult()
1024 case ISD::FTRUNC: ExpandFloatRes_FTRUNC(N, Lo, Hi); break; in ExpandFloatResult()
1866 case ISD::FTRUNC: R = PromoteFloatRes_UnaryOp(N); break; in PromoteFloatResult()
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| D | LegalizeVectorTypes.cpp | 95 case ISD::FTRUNC: in ScalarizeVectorResult()
651 case ISD::FTRUNC: in SplitVectorResult()
1448 case ISD::FTRUNC: in SplitVectorOperand()
2105 case ISD::FTRUNC: in WidenVectorResult()
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| D | LegalizeVectorOps.cpp | 318 case ISD::FTRUNC: in LegalizeOp()
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| D | LegalizeDAG.cpp | 4075 case ISD::FTRUNC: in ConvertNodeToLibcall()
4443 case ISD::FTRUNC: in PromoteNode()
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| D | SelectionDAG.cpp | 2934 case ISD::FTRUNC: { in getNode()
2990 case ISD::FTRUNC: in getNode()
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| D | SelectionDAGBuilder.cpp | 4772 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break; in visitIntrinsicCall()
5864 if (visitUnaryFloatCall(I, ISD::FTRUNC)) in visitCall()
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| D | DAGCombiner.cpp | 1430 case ISD::FTRUNC: return visitFTRUNC(N); in visit()
9156 return DAG.getNode(ISD::FTRUNC, SDLoc(N), VT, N0); in visitFTRUNC()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 141 {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, ISD::FRINT}) in WebAssemblyTargetLowering()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 536 fq = DAG.getNode(ISD::FTRUNC, DL, FLTTY, fq); in LowerSDIV24()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 164 setOperationAction(ISD::FTRUNC, MVT::f128, Expand); in AArch64TargetLowering()
304 setOperationAction(ISD::FTRUNC, MVT::f16, Promote); in AArch64TargetLowering()
344 setOperationAction(ISD::FTRUNC, MVT::v4f16, Expand); in AArch64TargetLowering()
377 setOperationAction(ISD::FTRUNC, MVT::v8f16, Expand); in AArch64TargetLowering()
395 setOperationAction(ISD::FTRUNC, Ty, Legal); in AArch64TargetLowering()
549 setOperationAction(ISD::FTRUNC, MVT::v1f64, Expand); in AArch64TargetLowering()
621 setOperationAction(ISD::FTRUNC, Ty, Legal); in AArch64TargetLowering()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 851 setOperationAction(ISD::FTRUNC, VT, Expand); in initActions()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 513 setOperationAction(ISD::FTRUNC, MVT::v2f64, Expand); in ARMTargetLowering()
530 setOperationAction(ISD::FTRUNC, MVT::v4f32, Expand); in ARMTargetLowering()
547 setOperationAction(ISD::FTRUNC, MVT::v2f32, Expand); in ARMTargetLowering()
671 setOperationAction(ISD::FTRUNC, MVT::f64, Expand); in ARMTargetLowering()
976 setOperationAction(ISD::FTRUNC, MVT::f32, Legal); in ARMTargetLowering()
990 setOperationAction(ISD::FTRUNC, MVT::f64, Legal); in ARMTargetLowering()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 437 def ftrunc : SDNode<"ISD::FTRUNC" , SDTFPUnaryOp>;
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 363 setOperationAction(ISD::FTRUNC, VT, Legal); in SystemZTargetLowering()
402 setOperationAction(ISD::FTRUNC, MVT::v2f64, Legal); in SystemZTargetLowering()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1760 ISD::FLOG10, ISD::FEXP, ISD::FEXP2, ISD::FCEIL, ISD::FTRUNC, in HexagonTargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 662 setOperationAction(ISD::FTRUNC, MVT::f80, Expand); in X86TargetLowering()
715 setOperationAction(ISD::FTRUNC, VT, Expand); in X86TargetLowering()
961 setOperationAction(ISD::FTRUNC, RoundedTy, Legal); in X86TargetLowering()
1083 setOperationAction(ISD::FTRUNC, MVT::v8f32, Legal); in X86TargetLowering()
1096 setOperationAction(ISD::FTRUNC, MVT::v4f64, Legal); in X86TargetLowering()
1461 setOperationAction(ISD::FTRUNC, MVT::v16f32, Legal); in X86TargetLowering()
1462 setOperationAction(ISD::FTRUNC, MVT::v8f64, Legal); in X86TargetLowering()
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