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/external/llvm/lib/Transforms/Utils/
DLowerSwitch.cpp36 int64_t Low, High; member
48 [](const IntRange &A, const IntRange &B) { return A.High < B.High; }); in IsInRanges()
70 ConstantInt* High; member
74 : Low(low), High(high), BB(bb) {} in CaseRange()
99 const ConstantInt* CI2 = cast<const ConstantInt>(C2.High); in operator ()()
151 O << *B->Low << " -" << *B->High; in operator <<()
218 if (Begin->Low == LowerBound && Begin->High == UpperBound) { in switchConvert()
238 << " -" << Pivot.High->getValue() << "\n"); in switchConvert()
253 int64_t GapLow = LHS.back().High->getSExtValue() + 1; in switchConvert()
257 NewUpperBound = LHS.back().High; in switchConvert()
[all …]
/external/gemmlowp/meta/generators/
Dqnt_Nx8_neon.py42 emitter.AllLanes(registers.High(register))],
135 registers.High(lane.load_1),
137 registers.High(lane.load_2)],
146 quantize_setup.append([lane.load_2, lane.offset, registers.High(lane_temp)])
184 emitter.Lane(registers.High(lane.load_1), 0),
190 registers.High(lane.load_1)],
196 registers.High(lane.load_1)],
206 registers.High(lane.load_1),
213 registers.High(lane.load_1),
218 emitter.Lane(registers.High(lane.load_2), 0),
[all …]
Dmul_Nx8_Mx8_neon.py43 lanes.AddLane(registers.High(quad_register))
201 registers.High(values), 0))
233 emitter.EmitVPadd('u32', registers.High(register),
255 registers.High(aggregator),
298 registers.Low(aggregator), registers.High(aggregator))
Dneon_emitter.py36 def High(register): function
96 def High(self, register): member in NeonRegisters
97 return High(register)
Dzip_Nx8_neon.py200 registers.High(lane.aggregator))
204 high = registers.High(temp)
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.h151 const ConstantInt *Low, *High; member
159 static CaseCluster range(const ConstantInt *Low, const ConstantInt *High, in range()
164 C.High = High; in range()
171 const ConstantInt *High, unsigned JTCasesIndex, in jumpTable()
176 C.High = High; in jumpTable()
182 static CaseCluster bitTests(const ConstantInt *Low, const ConstantInt *High, in bitTests()
187 C.High = High; in bitTests()
324 bool rangeFitsInWord(const APInt &Low, const APInt &High);
329 const APInt &Low, const APInt &High);
DSelectionDAGBuilder.cpp1790 const APInt& High = cast<ConstantInt>(CB.CmpRHS)->getValue(); in visitSwitchCase() local
1796 Cond = DAG.getSetCC(dl, MVT::i1, CmpOp, DAG.getConstant(High, dl, VT), in visitSwitchCase()
1802 DAG.getConstant(High-Low, dl, VT), ISD::SETULE); in visitSwitchCase()
2217 assert(CC.Low == CC.High && "Input clusters must be single-case"); in sortAndRangeify()
2234 (CaseVal->getValue() - Clusters[DstIndex - 1].High->getValue()) == 1) { in sortAndRangeify()
2237 Clusters[DstIndex - 1].High = CaseVal; in sortAndRangeify()
7669 APInt HighCase = Clusters[Last].High->getValue(); in isDense()
7713 APInt High = Clusters[I].High->getValue(); in buildJumpTable() local
7714 NumCmps += (Low == High) ? 1 : 2; in buildJumpTable()
7717 APInt PreviousHigh = Clusters[I - 1].High->getValue(); in buildJumpTable()
[all …]
/external/clang/test/Index/
Dcomplete-type-factors.m9 High
31 [a method:Red priority:High];
41 // CHECK-CC1: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (32)
56 // CHECK-CC2: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (65)
72 // CHECK-CC3: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (16)
88 // CHECK-CC4: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (65)
106 // CHECK-CC6: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (65)
122 // CHECK-CC7: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (65)
134 // CHECK-CC8: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (16)
/external/chromium-trace/catapult/telemetry/third_party/modulegraph/doc/
Dfind_modules.rst1 :mod:`modulegraph.find_modules` --- High-level module dependency finding interface
5 :synopsis: High-level module dependency finding interface
13 High-level interface, takes iterables for: scripts, includes, packages, excludes
/external/llvm/test/Analysis/LoopAccessAnalysis/
Dnumber-of-memchecks.ll98 ; CHECK-NEXT: (Low: %c High: (78 + %c))
102 ; CHECK-NEXT: (Low: %a High: (40 + %a))
106 ; CHECK-NEXT: (Low: %b High: (38 + %b))
170 ; CHECK-NEXT: (Low: %c High: (78 + %c))
174 ; CHECK-NEXT: (Low: %a High: (40 + %a))
178 ; CHECK-NEXT: (Low: %b High: (38 + %b))
249 ; CHECK-NEXT: (Low: ((2 * %offset) + %a) High: (9998 + (2 * %offset) + %a))
252 ; CHECK-NEXT: (Low: %a High: (9998 + %a))
255 ; CHECK-NEXT: (Low: (20000 + %a) High: (29998 + %a))
Dreverse-memcheck-bounds.ll18 ; CHECK: (Low: (20000 + %a) High: (60000 + %a))
61 ; CHECK: High: ((60000 + %a) umax (60000 + (-40000 * %step) + %a))
/external/llvm/lib/Target/Hexagon/
DHexagonAsmPrinter.cpp400 unsigned High = RI->getSubReg(MO1.getReg(), Hexagon::subreg_hireg); in HexagonProcessInstruction() local
403 TmpInst.addOperand(MCOperand::createReg(High)); in HexagonProcessInstruction()
485 unsigned High = RI->getSubReg(MO.getReg(), Hexagon::subreg_hireg); in HexagonProcessInstruction() local
487 MO.setReg(High); in HexagonProcessInstruction()
497 unsigned High = RI->getSubReg(MO.getReg(), Hexagon::subreg_hireg); in HexagonProcessInstruction() local
499 MO.setReg(High); in HexagonProcessInstruction()
510 unsigned High = RI->getSubReg(MO.getReg(), Hexagon::subreg_hireg); in HexagonProcessInstruction() local
512 MO.setReg(High); in HexagonProcessInstruction()
/external/llvm/include/llvm/IR/
DInlineAsm.h350 unsigned High = Flag >> 16; in hasRegClassConstraint() local
353 if (!High) in hasRegClassConstraint()
355 RC = High - 1; in hasRegClassConstraint()
DIntrinsicsAArch64.td186 // Vector Add High-Half
191 // Vector Rounding Add High-Half
194 // Vector Saturating Doubling Multiply High
197 // Vector Saturating Rounding Doubling Multiply High
231 // Vector Subtract High-Half
236 // Vector Rounding Subtract High-Half
/external/llvm/lib/Target/X86/
DX86RegisterInfo.h141 unsigned getX86SubSuperRegister(unsigned, MVT::SimpleValueType, bool High=false);
146 bool High = false);
/external/llvm/unittests/ADT/
DVariadicFunctionTest.cpp88 void CountInRangeImpl(int *NumInRange, int Low, int High, in CountInRangeImpl() argument
92 if (Low <= *Args[i] && *Args[i] <= High) in CountInRangeImpl()
/external/libvpx/libvpx/test/
Dregister_state_check.h43 return (lhs.Low == rhs.Low && lhs.High == rhs.High);
/external/skia/src/sfnt/
DSkPanose.h98 ((High, 8))
285 ((High, 8))
355 ((High, 5))
426 ((High, 8))
/external/llvm/test/CodeGen/X86/
Dload-slice.ll14 ; Low High
17 ; High slice starts at 4 (base + 4-bytes) and is 4-bytes aligned.
88 ; Low High
91 ; High slice starts at 6 (base + 6-bytes) and is 2-bytes aligned.
/external/lz4/
Dlz4_block_format.txt47 - 15 : value for the 4-bits High field
51 - 15 : value for the 4-bits High field
56 - 15 : value for the 4-bits High field
/external/chromium-trace/catapult/third_party/webapp2/docs/tutorials/gettingstarted/
Dusingdatastore.rst17 The default datastore for an application is now the `High Replication datastore <http://code.google…
19 to replicate data across datacenters. The High Replication datastore is
27 see `Using the High Replication Datastore <http://code.google.com/appengine/docs/python/datastore/h…
35 In the High Replication Datastore, entity groups are also a unit of
46 see `Using the High Replication Datastore <http://code.google.com/appengine/docs/python/datastore/h…
81 # Ancestor Queries, as shown here, are strongly consistent with the High
214 Because querying in the High Replication datastore is only strongly consistent
/external/opencv3/doc/tutorials/highgui/
Dtable_of_content_highgui.markdown1 High Level GUI and Media (highgui module) {#tutorial_table_of_content_highgui}
/external/llvm/lib/IR/
DMetadata.cpp858 ConstantInt *Low, ConstantInt *High) { in tryMergeRange() argument
859 ConstantRange NewRange(Low->getValue(), High->getValue()); in tryMergeRange()
866 Type *Ty = High->getType(); in tryMergeRange()
877 ConstantInt *Low, ConstantInt *High) { in addRange() argument
879 if (tryMergeRange(EndPoints, Low, High)) in addRange()
883 EndPoints.push_back(High); in addRange()
/external/llvm/include/llvm/Analysis/
DLoopAccessAnalysis.h383 : RtCheck(RtCheck), High(RtCheck.Pointers[Index].End), in CheckingPtrGroup()
401 const SCEV *High; member
/external/vixl/test/examples/
Dtest-examples.cc495 #define CHECKBOUNDS_DOTEST(Value, Low, High) \ argument
500 simulator.set_xreg(2, High); \
502 assert(regs.xreg(0) == ((Low <= Value) && (Value <= High))); \

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