/external/v8/test/unittests/compiler/ |
D | interpreter-assembler-unittest.cc | 69 Matcher<Node*> InterpreterAssemblerTest::InterpreterAssemblerForTest::IsLoad( in IsLoad() function in v8::internal::compiler::InterpreterAssemblerTest::InterpreterAssemblerForTest 72 return ::i::compiler::IsLoad(rep_matcher, base_matcher, index_matcher, _, _); in IsLoad() 88 return IsLoad( in IsBytecodeOperand() 98 Matcher<Node*> load_matcher = IsLoad( in IsBytecodeOperandSignExtended() 114 return IsLoad( in IsBytecodeOperandShort() 120 Matcher<Node*> first_byte = IsLoad( in IsBytecodeOperandShort() 125 Matcher<Node*> second_byte = IsLoad( in IsBytecodeOperandShort() 147 load_matcher = IsLoad( in IsBytecodeOperandShortSignExtended() 163 Matcher<Node*> hi_byte = IsLoad( in IsBytecodeOperandShortSignExtended() 169 Matcher<Node*> lo_byte = IsLoad( in IsBytecodeOperandShortSignExtended() [all …]
|
D | interpreter-assembler-unittest.h | 32 Matcher<Node*> IsLoad(const Matcher<LoadRepresentation>& rep_matcher,
|
D | change-lowering-unittest.cc | 74 return IsLoad(MachineType::Float64(), value_matcher, in IsLoadHeapNumber() 234 IsLoad(MachineType::AnyTagged(), p0, in TARGET_TEST_P() 310 EXPECT_THAT(r.replacement(), IsLoad(MachineType::AnyTagged(), p0, index_match, in TARGET_TEST_P() 331 EXPECT_THAT(r.replacement(), IsLoad(MachineType::Int8(), p0, index_match, in TARGET_TEST_P()
|
/external/llvm/lib/CodeGen/ |
D | AtomicExpandPass.cpp | 51 bool IsStore, bool IsLoad); 103 bool IsStore, IsLoad; in runOnFunction() local 109 IsLoad = true; in runOnFunction() 114 IsLoad = false; in runOnFunction() 119 IsStore = IsLoad = true; in runOnFunction() 130 IsStore = IsLoad = true; in runOnFunction() 134 MadeChange |= bracketInstWithFences(I, FenceOrdering, IsStore, IsLoad); in runOnFunction() 179 bool IsStore, bool IsLoad) { in bracketInstWithFences() argument 182 auto LeadingFence = TLI->emitLeadingFence(Builder, Order, IsStore, IsLoad); in bracketInstWithFences() 184 auto TrailingFence = TLI->emitTrailingFence(Builder, Order, IsStore, IsLoad); in bracketInstWithFences()
|
D | InlineSpiller.cpp | 1018 bool IsLoad = InstrReg; in coalesceStackAccess() local 1019 if (!IsLoad) in coalesceStackAccess() 1030 if (IsLoad) { in coalesceStackAccess()
|
/external/llvm/lib/Target/PowerPC/ |
D | PPCVSXSwapRemoval.cpp | 78 unsigned int IsLoad : 1; member 342 SwapVector[VecIdx].IsLoad = 1; in gatherVectorInstructions() 348 SwapVector[VecIdx].IsLoad = 1; in gatherVectorInstructions() 357 SwapVector[VecIdx].IsLoad = 1; in gatherVectorInstructions() 663 else if (SwapVector[EntryIdx].IsLoad && SwapVector[EntryIdx].IsSwap) { in recordUnoptimizableWebs() 674 if (!SwapVector[UseIdx].IsSwap || SwapVector[UseIdx].IsLoad || in recordUnoptimizableWebs() 697 if (!SwapVector[DefIdx].IsSwap || SwapVector[DefIdx].IsLoad || in recordUnoptimizableWebs() 728 if (SwapVector[EntryIdx].IsLoad && SwapVector[EntryIdx].IsSwap) { in markSwapsForRemoval() 938 if (SwapVector[EntryIdx].IsLoad) in dumpSwapVector()
|
D | PPCISelLowering.h | 512 bool IsStore, bool IsLoad) const override; 514 bool IsStore, bool IsLoad) const override;
|
/external/llvm/lib/Target/NVPTX/ |
D | NVPTXInstrFormats.td | 36 bit IsLoad = 0; 52 let TSFlags{5-5} = IsLoad;
|
/external/clang/lib/StaticAnalyzer/Core/ |
D | CheckerManager.cpp | 293 bool IsLoad; member 305 : Checkers(checkers), Loc(loc), IsLoad(isLoad), NodeEx(NodeEx), in CheckLocationContext() 310 ProgramPoint::Kind K = IsLoad ? ProgramPoint::PreLoadKind : in runChecker() 317 checkFn(Loc, IsLoad, BoundEx, C); in runChecker()
|
/external/llvm/lib/Target/X86/Utils/ |
D | X86ShuffleDecode.h | 109 void DecodeScalarMoveMask(MVT VT, bool IsLoad,
|
D | X86ShuffleDecode.cpp | 455 void DecodeScalarMoveMask(MVT VT, bool IsLoad, SmallVectorImpl<int> &Mask) { in DecodeScalarMoveMask() argument 461 Mask.push_back(IsLoad ? static_cast<int>(SM_SentinelZero) : i); in DecodeScalarMoveMask()
|
/external/llvm/lib/Target/AMDGPU/ |
D | SIRegisterInfo.cpp | 215 bool IsLoad = TII->get(LoadStoreOp).mayLoad(); in buildScratchLoadStore() local 244 .addReg(SubReg, getDefRegState(IsLoad)) in buildScratchLoadStore() 251 .addReg(Value, RegState::Implicit | getDefRegState(IsLoad)) in buildScratchLoadStore()
|
/external/clang/lib/StaticAnalyzer/Checkers/ |
D | CheckerDocumentation.cpp | 138 void checkLocation(SVal Loc, bool IsLoad, const Stmt *S, in checkLocation() argument
|
D | NSErrorChecker.cpp | 241 if (event.IsLoad) in checkEvent()
|
/external/llvm/lib/Target/ARM/ |
D | ARMLoadStoreOptimizer.cpp | 454 bool IsLoad = in UpdateBaseRegUses() local 459 if (IsLoad || IsStore) { in UpdateBaseRegUses() 777 bool IsLoad = isi32Load(Opcode); in CreateLoadStoreDouble() local 778 assert((IsLoad || isi32Store(Opcode)) && "Must have integer load or store"); in CreateLoadStoreDouble() 779 unsigned LoadStoreOpcode = IsLoad ? ARM::t2LDRDi8 : ARM::t2STRDi8; in CreateLoadStoreDouble() 784 if (IsLoad) { in CreateLoadStoreDouble() 799 bool IsLoad = isLoadSingle(Opcode); in MergeOpsUpdate() local 814 if (IsLoad) { in MergeOpsUpdate()
|
D | ARMExpandPseudoInsts.cpp | 107 bool IsLoad; member 382 assert(TableEntry && TableEntry->IsLoad && "NEONLdStTable lookup failed"); in ExpandVLD() 447 assert(TableEntry && !TableEntry->IsLoad && "NEONLdStTable lookup failed"); in ExpandVST() 523 if (TableEntry->IsLoad) { in ExpandLaneOp() 548 if (!TableEntry->IsLoad) in ExpandLaneOp() 573 if (TableEntry->IsLoad) in ExpandLaneOp()
|
D | ARMISelLowering.h | 443 bool IsStore, bool IsLoad) const override; 445 bool IsStore, bool IsLoad) const override;
|
/external/clang/lib/CodeGen/ |
D | CGAtomic.cpp | 1035 bool IsLoad = E->getOp() == AtomicExpr::AO__c11_atomic_load || in EmitAtomicExpr() local 1054 if (IsLoad) in EmitAtomicExpr() 1060 if (IsLoad || IsStore) in EmitAtomicExpr() 1091 if (!IsLoad) in EmitAtomicExpr() 1093 if (!IsLoad && !IsStore) in EmitAtomicExpr() 1120 if (!IsLoad) { in EmitAtomicExpr() 1128 if (!IsLoad && !IsStore) { in EmitAtomicExpr()
|
/external/v8/src/arm64/ |
D | instructions-arm64.cc | 16 bool Instruction::IsLoad() const { in IsLoad() function in v8::internal::Instruction
|
D | instructions-arm64.h | 230 bool IsLoad() const;
|
/external/vixl/src/vixl/a64/ |
D | instructions-a64.cc | 74 bool Instruction::IsLoad() const { in IsLoad() function in vixl::Instruction
|
D | instructions-a64.h | 269 bool IsLoad() const;
|
/external/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 1070 bool IsLoad = fieldFromInstruction(insn, 22, 1); in DecodeSignedLdStInstruction() local 1075 if (IsLoad && IsIndexed && !IsFP && Rn != 31 && Rt == Rn) in DecodeSignedLdStInstruction() 1171 bool IsLoad = fieldFromInstruction(insn, 22, 1); in DecodePairLdStInstruction() local 1282 if (IsLoad && Rt == Rt2) in DecodePairLdStInstruction()
|
/external/llvm/lib/Target/Hexagon/ |
D | HexagonExpandCondsets.cpp | 853 bool IsLoad = TheI->mayLoad(), IsStore = TheI->mayStore(); in canMoveMemTo() local 854 if (!IsLoad && !IsStore) in canMoveMemTo()
|
/external/clang/include/clang/StaticAnalyzer/Core/ |
D | Checker.h | 529 bool IsLoad; member
|