Home
last modified time | relevance | path

Searched refs:MM7 (Results 1 – 12 of 12) sorted by relevance

/external/mesa3d/src/mesa/x86/
D3dnow_normal.S83 MOVQ ( M(10), MM7 ) /* | m10 */
95 PFMUL ( MM0, MM7 ) /* | scale * m10 */
123 PFMUL ( MM7, MM2 ) /* | x2*m10 */
256 MOVD ( ARG_SCALE, MM7 ) /* | scale */
257 PUNPCKLDQ ( MM7, MM7 ) /* scale | scale */
259 PFMUL ( MM7, MM0 ) /* scale * m5 | scale * m0 */
260 PFMUL ( MM7, MM2 ) /* scale * m10 | scale * m10 */
276 MOVD ( REGOFF(8, EDX), MM7 ) /* | x2 */
283 PFMUL ( MM2, MM7 ) /* | x2*m10 */
286 PFMUL ( MM3, MM7 ) /* | x2 (normalized) */
[all …]
D3dnow_xform4.S97 MOVQ ( MM6, MM7 ) /* x3 | x3 */
105 PFMUL ( REGOFF(56, ECX), MM7 ) /* x3*m15 | x3*m14 */
108 PFADD ( MM5, MM7 )
111 PFADD ( MM3, MM7 )
114 MOVQ ( MM7, REGOFF(-8, EDX) )
165 PXOR ( MM7, MM7 ) /* 0 | 0 */
186 PFSUBR ( MM7, MM3 ) /* | -x2 */
238 MOVD ( REGOFF(40, ECX), MM7 ) /* | m10 */
239 PUNPCKLDQ ( REGOFF(56, ECX), MM7 ) /* m14 | m10 */
274 PFMUL ( MM7, MM5 ) /* x3*m14 | x2*m10 */
[all …]
D3dnow_xform2.S81 MOVQ ( MM6, MM7 ) /* x1 | x0 */
84 PFMUL ( MM1, MM7 ) /* x1*m11 | x0*m01 */
86 PFACC ( MM7, MM6 ) /* x0*m01+x1*m11 | x0*x00+x1*m10 */
92 MOVQ ( MM6, MM7 ) /* x1 | x0 */
95 PFMUL ( MM3, MM7 ) /* x1*m13 | x0*m03 */
98 PFACC ( MM7, MM6 ) /* x0*m03+x1*m13 | x0*x02+x1*m12 */
215 MOVQ ( MM6, MM7 ) /* x1 | x0 */
218 PFMUL ( MM1, MM7 ) /* x1*m11 | x0*m01 */
220 PFACC ( MM7, MM6 ) /* x0*m01+x1*m11 | x0*x00+x1*m10 */
226 MOVQ ( MM6, MM7 ) /* x1 | x0 */
[all …]
Dmmx_blend.S321 MOVQ ( REGIND(ESP), MM7 ) ;\
328 PXOR ( MM7, MM3 ) /* unsigned -> signed */ ;\
329 PXOR ( MM7, MM4 ) /* unsigned -> signed */ ;\
353 MOVQ ( REGIND(ESP), MM7 ) ;\
360 PXOR ( MM7, MM3 ) /* unsigned -> signed */ ;\
361 PXOR ( MM7, MM4 ) /* unsigned -> signed */ ;\
386 MOVQ ( REGIND(ESP), MM7 ) ;\
392 GMB_MULT_GSR( MM1, MM2, MM4, MM5, MM7 ) ;\
D3dnow_xform3.S169 PXOR ( MM7, MM7 ) /* 0 | 0 */
173 PFSUB ( MM5, MM7 ) /* | -x2 */
187 MOVD ( MM7, REGOFF(-4, EDX) ) /* write r3 */
231 MOVD ( REGOFF(8, ECX), MM7 ) /* | m2 */
232 PUNPCKLDQ ( REGOFF(24, ECX), MM7 ) /* m6 | m2 */
264 PFMUL ( MM7, MM0 ) /* x1*m6 | x0*m2 */
Dassyntax.h222 #define MM7 %mm7 macro
/external/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h214 ENTRY(MM7)
/external/llvm/docs/TableGen/
Dindex.rst65 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, R10, R10B, R10D, R10W, R11, R11B, R11D,
DLangIntro.rst543 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
/external/llvm/lib/Target/X86/InstPrinter/
DX86InstComments.cpp31 if (X86::MM0 <= RegNo && RegNo <= X86::MM7) in getVectorRegSize()
/external/llvm/lib/Target/X86/
DX86RegisterInfo.td159 def MM7 : X86Reg<"mm7", 7>, DwarfRegNum<[48, 36, 36]>;
DX86InstrCompiler.td448 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
468 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,