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Searched refs:Negate (Results 1 – 25 of 112) sorted by relevance

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/external/mesa3d/src/gallium/drivers/r300/compiler/
Dradeon_optimize.c56 combine.Negate = outer.Negate; in chain_srcregs()
59 combine.Negate = swizzle_mask(outer.Swizzle, inner.Negate); in chain_srcregs()
60 combine.Negate ^= outer.Negate; in chain_srcregs()
197 *pnegate = GET_BIT(src.Negate, chan); in is_src_uniform_constant()
200 if (swz != *pswz || *pnegate != GET_BIT(src.Negate, chan)) { in is_src_uniform_constant()
226 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; in constant_folding_mad()
240 inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW; in constant_folding_mad()
261 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; in constant_folding_mul()
274 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; in constant_folding_mul()
371 newsrc.Negate ^= 1 << chan; in constant_folding()
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Dr300_fragprog_swizzle.c117 if (reg.Abs || reg.Negate) in r300_swizzle_is_native()
137 if ((reg.Negate & relevant) && ((reg.Negate & relevant) != relevant)) in r300_swizzle_is_native()
173 if (matchmask && (!!(src.Negate & matchmask) != !!(src.Negate & (1 << comp)))) in r300_swizzle_split()
Dradeon_dataflow_swizzles.c71 masked_negate = split.Phase[phase] & mov->U.I.SrcReg[0].Negate; in rewrite_source()
73 mov->U.I.SrcReg[0].Negate = 0; in rewrite_source()
75 mov->U.I.SrcReg[0].Negate = RC_MASK_XYZW; in rewrite_source()
82 inst->U.I.SrcReg[src].Negate = RC_MASK_NONE; in rewrite_source()
Dradeon_pair_translate.c47 inst->SrcReg[1].Negate = RC_MASK_NONE; in final_rewrite()
245 …pair->RGB.Arg[i].Negate = !!(srcmask & inst->SrcReg[i].Negate & (RC_MASK_X | RC_MASK_Y | RC_MASK_Z… in set_pair_instruction()
273 pair->Alpha.Arg[i].Negate = in set_pair_instruction()
274 !!(inst->SrcReg[i].Negate & in set_pair_instruction()
277 pair->Alpha.Arg[i].Negate = in set_pair_instruction()
278 !!(inst->SrcReg[i].Negate & RC_MASK_W); in set_pair_instruction()
Dr500_fragprog.c178 inst_if->U.I.SrcReg[0].Negate = 0; in r500_transform_IF()
197 if (opcode == RC_OPCODE_KIL && (reg.Swizzle != RC_SWIZZLE_XYZW || reg.Negate != RC_MASK_NONE)) in r500_swizzle_is_native()
203 reg.Negate &= ~(1 << i); in r500_swizzle_is_native()
210 if (reg.Negate) in r500_swizzle_is_native()
217 if (reg.Swizzle == RC_SWIZZLE_XYZW && !reg.Abs && !reg.Negate) in r500_swizzle_is_native()
231 if ((reg.Negate & relevant) && ((reg.Negate & relevant) != relevant)) in r500_swizzle_is_native()
254 negatebase[GET_BIT(src.Negate, i)] |= 1 << i; in r500_swizzle_split()
Dradeon_program_print.c235 int trivial_negate = (src.Negate == RC_MASK_NONE || src.Negate == RC_MASK_XYZW); in rc_print_src_register()
237 if (src.Negate == RC_MASK_XYZW) in rc_print_src_register()
252 rc_print_swizzle(f, src.Swizzle, trivial_negate ? 0 : src.Negate); in rc_print_src_register()
406 const char* neg = inst->RGB.Arg[arg].Negate ? "-" : ""; in rc_print_pair_instruction()
441 const char* neg = inst->Alpha.Arg[arg].Negate ? "-" : ""; in rc_print_pair_instruction()
Dradeon_inline_literals.c137 src_reg->Negate = src_reg->Negate ^ negate_mask; in rc_inline_literals()
Dradeon_program_alu.c152 newreg.Negate = RC_MASK_NONE; in absolute()
159 newreg.Negate = newreg.Negate ^ RC_MASK_XYZW; in negate()
234 src.Negate = RC_MASK_NONE; in transform_ABS()
280 src0.Negate &= ~(RC_MASK_Z | RC_MASK_W); in transform_DP2()
283 src1.Negate &= ~(RC_MASK_Z | RC_MASK_W); in transform_DP2()
294 src0.Negate &= ~RC_MASK_W; in transform_DPH()
701 inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW; in transform_r300_vertex_ABS()
746 src0.Negate &= ~RC_MASK_W; in transform_r300_vertex_DP3()
749 src1.Negate &= ~RC_MASK_W; in transform_r300_vertex_DP3()
839 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; in transform_r300_vertex_SGT()
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Dradeon_program_tex.c230 inst_add->U.I.SrcReg[1].Negate = inst_add->U.I.SrcReg[1].Negate ^ RC_MASK_XYZW; in radeonTransformTEX()
232 inst_add->U.I.SrcReg[0].Negate = inst_add->U.I.SrcReg[0].Negate ^ RC_MASK_XYZW; in radeonTransformTEX()
361 inst_mad->U.I.SrcReg[2].Negate = RC_MASK_XYZ; in radeonTransformTEX()
374 inst_add->U.I.SrcReg[1].Negate = RC_MASK_XYZ; in radeonTransformTEX()
464 inst_mad->U.I.SrcReg[2].Negate = RC_MASK_XYZW; in radeonTransformTEX()
Dradeon_program_pair.h68 unsigned int Negate:1; member
Dradeon_emulate_loops.c108 inst->U.I.SrcReg[0].Negate, 0); in update_const_value()
159 inst->U.I.SrcReg[amnt_src_index].Negate, 0); in get_incr_amount()
280 limit->Negate, 0); in try_unroll_loop()
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_util.c116 if( reg->Register.Negate ) { in tgsi_util_get_full_src_register_sign_mode()
124 if( reg->Register.Negate ) { in tgsi_util_get_full_src_register_sign_mode()
143 reg->Register.Negate = 0; in tgsi_util_set_full_src_register_sign_mode()
149 reg->Register.Negate = 1; in tgsi_util_set_full_src_register_sign_mode()
153 reg->Register.Negate = 1; in tgsi_util_set_full_src_register_sign_mode()
158 reg->Register.Negate = 0; in tgsi_util_set_full_src_register_sign_mode()
Dtgsi_build.c648 instruction_predicate.Negate = 0; in tgsi_default_instruction_predicate()
672 instruction_predicate.Negate = negate; in tgsi_build_instruction_predicate()
788 src_register.Negate = 0; in tgsi_default_src_register()
827 src_register.Negate = negate; in tgsi_build_src_register()
998 full_inst->Predicate.Negate, in tgsi_build_full_instruction()
1092 reg->Indirect.Negate, in tgsi_build_full_instruction()
1131 reg->DimIndirect.Negate, in tgsi_build_full_instruction()
1157 reg->Register.Negate, in tgsi_build_full_instruction()
1179 reg->Indirect.Negate, in tgsi_build_full_instruction()
1218 reg->DimIndirect.Negate, in tgsi_build_full_instruction()
Dtgsi_ureg.h56 unsigned Negate : 1; /* BOOL */ member
853 reg.Negate ^= 1; in ureg_negate()
862 reg.Negate = 0; in ureg_abs()
1018 src.Negate = 0; in ureg_src_register()
1045 src.Negate = 0; in ureg_src()
1096 src.Negate = 0; in ureg_src_undef()
/external/regex-re2/re2/testing/
Dcharclass_test.cc118 CharClass* Negate(CharClass *cc) { in Negate() function
119 return cc->Negate(); in Negate()
126 CharClassBuilder* Negate(CharClassBuilder* cc) { in Negate() function
128 ncc->Negate(); in Negate()
170 CharClass* ncc = Negate(cc); in CorrectCC()
/external/mesa3d/src/gallium/drivers/r300/compiler/tests/
Drc_test_helpers.c70 struct match_info Negate; member
106 tokens.Negate.String = src_str + matches[1].rm_so; in init_rc_normal_src()
107 tokens.Negate.Length = match_length(matches, 1); in init_rc_normal_src()
118 if (tokens.Negate.Length > 0) { in init_rc_normal_src()
119 src_reg->Negate = RC_MASK_XYZW; in init_rc_normal_src()
158 src_reg->Negate |= (1 << i); in init_rc_normal_src()
194 src_reg->Negate, src_reg->Abs); in init_rc_normal_src()
/external/mesa3d/src/mesa/program/
Dprog_opt_constant_fold.c84 && (a->Negate == b->Negate) in src_regs_are_same()
107 if (r->Negate & 0x01) { in get_value()
111 if (r->Negate & 0x02) { in get_value()
115 if (r->Negate & 0x04) { in get_value()
119 if (r->Negate & 0x08) { in get_value()
/external/mesa3d/src/mesa/drivers/dri/r200/
Dr200_vertprog.c293 src->Negate) | (src->RelAddr << 4); in t_src()
305 src->Negate ? VSF_FLAG_ALL : VSF_FLAG_NONE) | (src->RelAddr << 4); in t_src_scalar()
719 src[0].Negate) | (src[0].RelAddr << 4); in r200_translate_vertex_program()
731 src[0].Negate ? VSF_FLAG_ALL : VSF_FLAG_NONE) | (src[0].RelAddr << 4); in r200_translate_vertex_program()
736 src[1].Negate ? VSF_FLAG_ALL : VSF_FLAG_NONE) | (src[1].RelAddr << 4); in r200_translate_vertex_program()
785 src[1].Negate) | (src[1].RelAddr << 4); in r200_translate_vertex_program()
789 src[1].Negate) | (src[1].RelAddr << 4); in r200_translate_vertex_program()
811 src[0].Negate) | (src[0].RelAddr << 4); in r200_translate_vertex_program()
819 src[1].Negate) | (src[1].RelAddr << 4); in r200_translate_vertex_program()
834 src[0].Negate) | (src[0].RelAddr << 4); in r200_translate_vertex_program()
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/external/mesa3d/src/gallium/drivers/i915/
Di915_fpc_optimize.c62 d1->Register.Negate == d2->Register.Negate); in same_src_reg()
159 o->Negate = i->Negate; in copy_src_reg()
266 current.FullInstruction.Src[0].Register.Negate == 0 && in i915_fpc_useless_mov()
290 next->FullInstruction.Src[0].Register.Negate == 0 && in i915_fpc_optimize_useless_mov_after_inst()
/external/clang/lib/Analysis/
DThreadSafety.cpp945 bool &Negate);
1330 bool &Negate) { in getTrylockCallExpr() argument
1338 return getTrylockCallExpr(PE->getSubExpr(), C, Negate); in getTrylockCallExpr()
1341 return getTrylockCallExpr(CE->getSubExpr(), C, Negate); in getTrylockCallExpr()
1344 return getTrylockCallExpr(EWC->getSubExpr(), C, Negate); in getTrylockCallExpr()
1348 return getTrylockCallExpr(E, C, Negate); in getTrylockCallExpr()
1352 Negate = !Negate; in getTrylockCallExpr()
1353 return getTrylockCallExpr(UOP->getSubExpr(), C, Negate); in getTrylockCallExpr()
1360 Negate = !Negate; in getTrylockCallExpr()
1364 if (!TCond) Negate = !Negate; in getTrylockCallExpr()
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/external/libweave/third_party/chromium/crypto/
Dp224.h55 void Negate(const Point& a, Point* out);
/external/libchrome/crypto/
Dp224.h58 void CRYPTO_EXPORT Negate(const Point& a, Point* out);
/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_wm_fp.c89 reg.Negate = NEGATE_NONE; in src_reg()
590 swz->SrcReg[0].Negate &= ~NEGATE_X; in precalc_dst()
649 swz->SrcReg[0].Negate = NEGATE_NONE; in precalc_lit()
701 out->SrcReg[0].Negate = NEGATE_NONE; in precalc_tex()
1105 out->SrcReg[0].Negate = NEGATE_NONE; in brw_wm_pass_fp()
1112 out->SrcReg[1].Negate ^= NEGATE_XYZW; in brw_wm_pass_fp()
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h546 unsigned Negate : 1; /* BOOL */ member
577 unsigned Negate : 1; /* BOOL */ member
/external/webrtc/webrtc/base/
Dbind_unittest.cc67 int Negate(int a) { return -a; } in Negate() function
156 EXPECT_EQ(3, Bind(&Negate, -3)()); in TEST()

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