/external/llvm/lib/Target/X86/InstPrinter/ |
D | X86ATTInstPrinter.h | 44 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS); 48 void printPCRelImm(const MCInst *MI, unsigned OpNo, raw_ostream &OS); 49 void printSrcIdx(const MCInst *MI, unsigned OpNo, raw_ostream &OS); 50 void printDstIdx(const MCInst *MI, unsigned OpNo, raw_ostream &OS); 51 void printMemOffset(const MCInst *MI, unsigned OpNo, raw_ostream &OS); 55 void printanymem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { in printanymem() argument 56 printMemReference(MI, OpNo, O); in printanymem() 59 void printopaquemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { in printopaquemem() argument 60 printMemReference(MI, OpNo, O); in printopaquemem() 63 void printi8mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { in printi8mem() argument [all …]
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D | X86IntelInstPrinter.h | 38 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 42 void printPCRelImm(const MCInst *MI, unsigned OpNo, raw_ostream &O); 43 void printMemOffset(const MCInst *MI, unsigned OpNo, raw_ostream &O); 44 void printSrcIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O); 45 void printDstIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O); 49 void printanymem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { in printanymem() argument 50 printMemReference(MI, OpNo, O); in printanymem() 53 void printopaquemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { in printopaquemem() argument 55 printMemReference(MI, OpNo, O); in printopaquemem() 58 void printi8mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { in printi8mem() argument [all …]
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/external/llvm/lib/Target/AMDGPU/InstPrinter/ |
D | AMDGPUInstPrinter.h | 38 void printU8ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 39 void printU16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 40 void printU8ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 41 void printU16ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 42 void printU32ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 43 void printOffen(const MCInst *MI, unsigned OpNo, raw_ostream &O); 44 void printIdxen(const MCInst *MI, unsigned OpNo, raw_ostream &O); 45 void printAddr64(const MCInst *MI, unsigned OpNo, raw_ostream &O); 46 void printMBUFOffset(const MCInst *MI, unsigned OpNo, raw_ostream &O); 47 void printDSOffset(const MCInst *MI, unsigned OpNo, raw_ostream &O); [all …]
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D | AMDGPUInstPrinter.cpp | 30 void AMDGPUInstPrinter::printU8ImmOperand(const MCInst *MI, unsigned OpNo, in printU8ImmOperand() argument 32 O << formatHex(MI->getOperand(OpNo).getImm() & 0xff); in printU8ImmOperand() 35 void AMDGPUInstPrinter::printU16ImmOperand(const MCInst *MI, unsigned OpNo, in printU16ImmOperand() argument 37 O << formatHex(MI->getOperand(OpNo).getImm() & 0xffff); in printU16ImmOperand() 40 void AMDGPUInstPrinter::printU32ImmOperand(const MCInst *MI, unsigned OpNo, in printU32ImmOperand() argument 42 O << formatHex(MI->getOperand(OpNo).getImm() & 0xffffffff); in printU32ImmOperand() 45 void AMDGPUInstPrinter::printU8ImmDecOperand(const MCInst *MI, unsigned OpNo, in printU8ImmDecOperand() argument 47 O << formatDec(MI->getOperand(OpNo).getImm() & 0xff); in printU8ImmDecOperand() 50 void AMDGPUInstPrinter::printU16ImmDecOperand(const MCInst *MI, unsigned OpNo, in printU16ImmDecOperand() argument 52 O << formatDec(MI->getOperand(OpNo).getImm() & 0xffff); in printU16ImmDecOperand() [all …]
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsMCCodeEmitter.h | 67 unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo, 74 unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo, 80 unsigned getUImm5Lsl2Encoding(const MCInst &MI, unsigned OpNo, 84 unsigned getSImm3Lsa2Value(const MCInst &MI, unsigned OpNo, 88 unsigned getUImm6Lsl2Encoding(const MCInst &MI, unsigned OpNo, 94 unsigned getSImm9AddiuspValue(const MCInst &MI, unsigned OpNo, 101 unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo, 108 unsigned getBranchTarget7OpValueMM(const MCInst &MI, unsigned OpNo, 115 unsigned getBranchTargetOpValueMMPC10(const MCInst &MI, unsigned OpNo, 122 unsigned getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo, [all …]
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D | MipsMCCodeEmitter.cpp | 221 getBranchTargetOpValue(const MCInst &MI, unsigned OpNo, in getBranchTargetOpValue() argument 225 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTargetOpValue() 244 getBranchTarget7OpValueMM(const MCInst &MI, unsigned OpNo, in getBranchTarget7OpValueMM() argument 248 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTarget7OpValueMM() 266 getBranchTargetOpValueMMPC10(const MCInst &MI, unsigned OpNo, in getBranchTargetOpValueMMPC10() argument 270 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTargetOpValueMMPC10() 288 getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo, in getBranchTargetOpValueMM() argument 292 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTargetOpValueMM() 311 getBranchTarget21OpValue(const MCInst &MI, unsigned OpNo, in getBranchTarget21OpValue() argument 315 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTarget21OpValue() [all …]
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
D | HexagonInstPrinter.cpp | 89 void HexagonInstPrinter::printOperand(MCInst const *MI, unsigned OpNo, in printOperand() argument 91 if (HexagonMCInstrInfo::getExtendableOp(MII, *MI) == OpNo && in printOperand() 94 MCOperand const &MO = MI->getOperand(OpNo); in printOperand() 108 void HexagonInstPrinter::printExtOperand(MCInst const *MI, unsigned OpNo, in printExtOperand() argument 110 printOperand(MI, OpNo, O); in printExtOperand() 114 unsigned OpNo, in printUnsignedImmOperand() argument 116 O << MI->getOperand(OpNo).getImm(); in printUnsignedImmOperand() 119 void HexagonInstPrinter::printNegImmOperand(MCInst const *MI, unsigned OpNo, in printNegImmOperand() argument 121 O << -MI->getOperand(OpNo).getImm(); in printNegImmOperand() 124 void HexagonInstPrinter::printNOneImmOperand(MCInst const *MI, unsigned OpNo, in printNOneImmOperand() argument [all …]
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D | HexagonInstPrinter.h | 39 void printOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const; 40 void printExtOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const; 41 void printUnsignedImmOperand(MCInst const *MI, unsigned OpNo, 43 void printNegImmOperand(MCInst const *MI, unsigned OpNo, 45 void printNOneImmOperand(MCInst const *MI, unsigned OpNo, 47 void prints3_6ImmOperand(MCInst const *MI, unsigned OpNo, 49 void prints3_7ImmOperand(MCInst const *MI, unsigned OpNo, 51 void prints4_6ImmOperand(MCInst const *MI, unsigned OpNo, 53 void prints4_7ImmOperand(MCInst const *MI, unsigned OpNo, 55 void printBranchOperand(MCInst const *MI, unsigned OpNo, [all …]
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/external/llvm/lib/Target/PowerPC/InstPrinter/ |
D | PPCInstPrinter.cpp | 156 void PPCInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNo, in printPredicateOperand() argument 159 unsigned Code = MI->getOperand(OpNo).getImm(); in printPredicateOperand() 250 printOperand(MI, OpNo+1, O); in printPredicateOperand() 253 void PPCInstPrinter::printU1ImmOperand(const MCInst *MI, unsigned OpNo, in printU1ImmOperand() argument 255 unsigned int Value = MI->getOperand(OpNo).getImm(); in printU1ImmOperand() 260 void PPCInstPrinter::printU2ImmOperand(const MCInst *MI, unsigned OpNo, in printU2ImmOperand() argument 262 unsigned int Value = MI->getOperand(OpNo).getImm(); in printU2ImmOperand() 267 void PPCInstPrinter::printU3ImmOperand(const MCInst *MI, unsigned OpNo, in printU3ImmOperand() argument 269 unsigned int Value = MI->getOperand(OpNo).getImm(); in printU3ImmOperand() 274 void PPCInstPrinter::printU4ImmOperand(const MCInst *MI, unsigned OpNo, in printU4ImmOperand() argument [all …]
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D | PPCInstPrinter.h | 47 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 48 void printPredicateOperand(const MCInst *MI, unsigned OpNo, 51 void printU1ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 52 void printU2ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 53 void printU3ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 54 void printU4ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 55 void printS5ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 56 void printU5ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 57 void printU6ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 58 void printU10ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); [all …]
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/external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
D | PPCMCCodeEmitter.cpp | 51 unsigned getDirectBrEncoding(const MCInst &MI, unsigned OpNo, 54 unsigned getCondBrEncoding(const MCInst &MI, unsigned OpNo, 57 unsigned getAbsDirectBrEncoding(const MCInst &MI, unsigned OpNo, 60 unsigned getAbsCondBrEncoding(const MCInst &MI, unsigned OpNo, 63 unsigned getImm16Encoding(const MCInst &MI, unsigned OpNo, 66 unsigned getMemRIEncoding(const MCInst &MI, unsigned OpNo, 69 unsigned getMemRIXEncoding(const MCInst &MI, unsigned OpNo, 72 unsigned getSPE8DisEncoding(const MCInst &MI, unsigned OpNo, 75 unsigned getSPE4DisEncoding(const MCInst &MI, unsigned OpNo, 78 unsigned getSPE2DisEncoding(const MCInst &MI, unsigned OpNo, [all …]
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/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
D | SIMCCodeEmitter.cpp | 84 unsigned GPRAlign(const MCInst &MI, unsigned OpNo, unsigned shift) const; 87 virtual unsigned GPR2AlignEncode(const MCInst &MI, unsigned OpNo, 91 virtual unsigned GPR4AlignEncode(const MCInst &MI, unsigned OpNo, 96 virtual uint64_t i32LiteralEncode(const MCInst &MI, unsigned OpNo, 100 virtual uint32_t SMRDmemriEncode(const MCInst &MI, unsigned OpNo, 161 unsigned SIMCCodeEmitter::GPRAlign(const MCInst &MI, unsigned OpNo, in GPRAlign() argument 163 unsigned regCode = getRegBinaryCode(MI.getOperand(OpNo).getReg()); in GPRAlign() 168 unsigned OpNo , in GPR2AlignEncode() argument 170 return GPRAlign(MI, OpNo, 1); in GPR2AlignEncode() 174 unsigned OpNo, in GPR4AlignEncode() argument [all …]
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/external/llvm/lib/CodeGen/AsmPrinter/ |
D | AsmPrinterInlineAsm.cpp | 212 unsigned OpNo = InlineAsm::MIOp_FirstOperand; in EmitMSInlineAsmStr() local 218 if (OpNo >= MI->getNumOperands()) break; in EmitMSInlineAsmStr() 219 unsigned OpFlags = MI->getOperand(OpNo).getImm(); in EmitMSInlineAsmStr() 220 OpNo += InlineAsm::getNumOperandRegisters(OpFlags) + 1; in EmitMSInlineAsmStr() 226 if (OpNo >= MI->getNumOperands() || in EmitMSInlineAsmStr() 227 MI->getOperand(OpNo).isMetadata()) { in EmitMSInlineAsmStr() 230 unsigned OpFlags = MI->getOperand(OpNo).getImm(); in EmitMSInlineAsmStr() 231 ++OpNo; // Skip over the ID number. in EmitMSInlineAsmStr() 234 Error = AP->PrintAsmMemoryOperand(MI, OpNo, InlineAsmVariant, in EmitMSInlineAsmStr() 237 Error = AP->PrintAsmOperand(MI, OpNo, InlineAsmVariant, in EmitMSInlineAsmStr() [all …]
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/external/llvm/lib/Target/MSP430/InstPrinter/ |
D | MSP430InstPrinter.cpp | 35 void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo, in printPCRelImmOperand() argument 37 const MCOperand &Op = MI->getOperand(OpNo); in printPCRelImmOperand() 46 void MSP430InstPrinter::printOperand(const MCInst *MI, unsigned OpNo, in printOperand() argument 49 const MCOperand &Op = MI->getOperand(OpNo); in printOperand() 61 void MSP430InstPrinter::printSrcMemOperand(const MCInst *MI, unsigned OpNo, in printSrcMemOperand() argument 64 const MCOperand &Base = MI->getOperand(OpNo); in printSrcMemOperand() 65 const MCOperand &Disp = MI->getOperand(OpNo+1); in printSrcMemOperand() 90 void MSP430InstPrinter::printCCOperand(const MCInst *MI, unsigned OpNo, in printCCOperand() argument 92 unsigned CC = MI->getOperand(OpNo).getImm(); in printCCOperand()
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D | MSP430InstPrinter.h | 35 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O, 37 void printPCRelImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 38 void printSrcMemOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O, 40 void printCCOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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/external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
D | SIMCCodeEmitter.cpp | 41 bool isSrcOperand(const MCInstrDesc &Desc, unsigned OpNo) const; 65 unsigned getSOPPBrEncoding(const MCInst &MI, unsigned OpNo, 79 unsigned OpNo) const { in isSrcOperand() 80 unsigned OpType = Desc.OpInfo[OpNo].OperandType; in isSrcOperand() 228 unsigned SIMCCodeEmitter::getSOPPBrEncoding(const MCInst &MI, unsigned OpNo, in getSOPPBrEncoding() argument 231 const MCOperand &MO = MI.getOperand(OpNo); in getSOPPBrEncoding() 257 unsigned OpNo = 0; in getMachineOpValue() local 258 for (unsigned e = MI.getNumOperands(); OpNo < e; ++OpNo) { in getMachineOpValue() 259 if (&MO == &MI.getOperand(OpNo)) in getMachineOpValue() 264 if (isSrcOperand(Desc, OpNo)) { in getMachineOpValue() [all …]
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/external/llvm/lib/Target/Sparc/MCTargetDesc/ |
D | SparcMCCodeEmitter.cpp | 60 unsigned getCallTargetOpValue(const MCInst &MI, unsigned OpNo, 63 unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo, 66 unsigned getBranchPredTargetOpValue(const MCInst &MI, unsigned OpNo, 69 unsigned getBranchOnRegTargetOpValue(const MCInst &MI, unsigned OpNo, 142 getCallTargetOpValue(const MCInst &MI, unsigned OpNo, in getCallTargetOpValue() argument 145 const MCOperand &MO = MI.getOperand(OpNo); in getCallTargetOpValue() 177 getBranchTargetOpValue(const MCInst &MI, unsigned OpNo, in getBranchTargetOpValue() argument 180 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTargetOpValue() 190 getBranchPredTargetOpValue(const MCInst &MI, unsigned OpNo, in getBranchPredTargetOpValue() argument 193 const MCOperand &MO = MI.getOperand(OpNo); in getBranchPredTargetOpValue() [all …]
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/external/llvm/lib/Target/BPF/InstPrinter/ |
D | BPFInstPrinter.cpp | 52 void BPFInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, in printOperand() argument 55 const MCOperand &Op = MI->getOperand(OpNo); in printOperand() 66 void BPFInstPrinter::printMemOperand(const MCInst *MI, int OpNo, raw_ostream &O, in printMemOperand() argument 68 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemOperand() 69 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemOperand() 81 void BPFInstPrinter::printImm64Operand(const MCInst *MI, unsigned OpNo, in printImm64Operand() argument 83 const MCOperand &Op = MI->getOperand(OpNo); in printImm64Operand()
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/external/llvm/lib/Target/Mips/ |
D | Mips16RegisterInfo.cpp | 80 unsigned OpNo, int FrameIndex, in eliminateFI() argument 113 if ((MI.getNumOperands()> OpNo+2) && MI.getOperand(OpNo+2).isReg()) in eliminateFI() 114 FrameReg = MI.getOperand(OpNo+2).getReg(); in eliminateFI() 131 Offset += MI.getOperand(OpNo + 1).getImm(); in eliminateFI() 147 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill); in eliminateFI() 148 MI.getOperand(OpNo + 1).ChangeToImmediate(Offset); in eliminateFI()
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/external/llvm/lib/Target/AMDGPU/ |
D | SIFoldOperands.cpp | 60 FoldCandidate(MachineInstr *MI, unsigned OpNo, MachineOperand *FoldOp) : in FoldCandidate() 61 UseMI(MI), UseOpNo(OpNo) { in FoldCandidate() 140 MachineInstr *MI, unsigned OpNo, in tryAddToFoldList() argument 143 if (!TII->isOperandLegal(MI, OpNo, OpToFold)) { in tryAddToFoldList() 148 (int)OpNo == AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2)) { in tryAddToFoldList() 152 bool FoldAsMAD = tryAddToFoldList(FoldList, MI, OpNo, OpToFold, TII); in tryAddToFoldList() 154 MI->untieRegOperand(OpNo); in tryAddToFoldList() 173 if (CommuteIdx0 == OpNo) in tryAddToFoldList() 174 OpNo = CommuteIdx1; in tryAddToFoldList() 175 else if (CommuteIdx1 == OpNo) in tryAddToFoldList() [all …]
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeTypes.h | 295 SDValue PromoteIntOp_BR_CC(SDNode *N, unsigned OpNo); 296 SDValue PromoteIntOp_BRCOND(SDNode *N, unsigned OpNo); 299 SDValue PromoteIntOp_INSERT_VECTOR_ELT(SDNode *N, unsigned OpNo); 304 SDValue PromoteIntOp_SELECT(SDNode *N, unsigned OpNo); 305 SDValue PromoteIntOp_SELECT_CC(SDNode *N, unsigned OpNo); 306 SDValue PromoteIntOp_SETCC(SDNode *N, unsigned OpNo); 310 SDValue PromoteIntOp_STORE(StoreSDNode *N, unsigned OpNo); 314 SDValue PromoteIntOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo); 315 SDValue PromoteIntOp_MLOAD(MaskedLoadSDNode *N, unsigned OpNo); 316 SDValue PromoteIntOp_MSCATTER(MaskedScatterSDNode *N, unsigned OpNo); [all …]
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/external/llvm/lib/Target/X86/ |
D | X86AsmPrinter.cpp | 185 unsigned OpNo, raw_ostream &O, 192 unsigned OpNo, raw_ostream &O) { in printPCRelImm() argument 193 const MachineOperand &MO = MI->getOperand(OpNo); in printPCRelImm() 198 printOperand(P, MI, OpNo, O); in printPCRelImm() 210 unsigned OpNo, raw_ostream &O, const char *Modifier, in printOperand() argument 212 const MachineOperand &MO = MI->getOperand(OpNo); in printOperand() 389 bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, in PrintAsmOperand() argument 396 const MachineOperand &MO = MI->getOperand(OpNo); in PrintAsmOperand() 401 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O); in PrintAsmOperand() 420 printOperand(*this, MI, OpNo, O); in PrintAsmOperand() [all …]
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDGPUCodeEmitter.h | 25 unsigned OpNo) const { in GPR4AlignEncode() argument 29 unsigned OpNo) const { in GPR2AlignEncode() argument 37 unsigned OpNo) const { in i32LiteralEncode() argument 40 virtual uint32_t SMRDmemriEncode(const MachineInstr &MI, unsigned OpNo) in SMRDmemriEncode() argument
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/external/mesa3d/src/gallium/drivers/radeon/InstPrinter/ |
D | AMDGPUInstPrinter.cpp | 14 void AMDGPUInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, in printOperand() argument 17 const MCOperand &Op = MI->getOperand(OpNo); in printOperand() 29 void AMDGPUInstPrinter::printMemOperand(const MCInst *MI, unsigned OpNo, in printMemOperand() argument 31 printOperand(MI, OpNo, O); in printMemOperand()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430AsmPrinter.cpp | 53 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 57 unsigned OpNo, unsigned AsmVariant, 127 bool MSP430AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, in PrintAsmOperand() argument 134 printOperand(MI, OpNo, O); in PrintAsmOperand() 139 unsigned OpNo, unsigned AsmVariant, in PrintAsmMemoryOperand() argument 145 printSrcMemOperand(MI, OpNo, O); in PrintAsmMemoryOperand()
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