Searched refs:POST_INC (Results 1 – 10 of 10) sorted by relevance
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 802 POST_INC, enumerator
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelDAGToDAG.cpp | 302 if (AM != ISD::POST_INC || LD->getExtensionType() != ISD::NON_EXTLOAD) in isValidIndexedLoad()
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| D | MSP430ISelLowering.cpp | 77 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in MSP430TargetLowering()
78 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in MSP430TargetLowering()
1130 AM = ISD::POST_INC; in getPostIndexedAddressParts()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 366 case ISD::POST_INC: return "<post-inc>"; in getIndexedModeName()
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| D | DAGCombiner.cpp | 9779 if (!TLI.isIndexedLoadLegal(ISD::POST_INC, VT) && in CombineToPostIndexedLoadStore()
9787 if (!TLI.isIndexedStoreLegal(ISD::POST_INC, VT) && in CombineToPostIndexedLoadStore()
9904 (AM == ISD::PRE_INC || AM == ISD::POST_INC ? ISD::ADD : ISD::SUB); in SplitIndexingFromLoad()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 910 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetReg()
946 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImmPre()
966 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImm()
1045 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode3Offset()
1138 if (AM != ISD::POST_INC) in SelectAddrMode6Offset()
1367 OffImm = ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC)) in SelectT2AddrModeImm8Offset()
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| D | ARMISelLowering.cpp | 11158 AM = isInc ? ISD::POST_INC : ISD::POST_DEC; in getPostIndexedAddressParts()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 935 AM = isInc ? ISD::POST_INC : ISD::POST_DEC; in getPostIndexedAddressParts()
1880 setIndexedLoadAction(ISD::POST_INC, LSXTy, Legal); in HexagonTargetLowering()
1881 setIndexedStoreAction(ISD::POST_INC, LSXTy, Legal); in HexagonTargetLowering()
1886 setIndexedLoadAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
1887 setIndexedStoreAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 900 return AM == ISD::POST_INC || AM == ISD::POST_DEC;
906 return AM == ISD::POST_INC || AM == ISD::POST_DEC;
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 9803 AM = IsInc ? ISD::POST_INC : ISD::POST_DEC; in getPostIndexedAddressParts()
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