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Searched refs:PRE_DEC (Results 1 – 8 of 8) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h801 PRE_DEC, enumerator
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp365 case ISD::PRE_DEC: return "<pre-dec>"; in getIndexedModeName()
DDAGCombiner.cpp9554 !TLI.isIndexedLoadLegal(ISD::PRE_DEC, VT)) in CombineToPreIndexedLoadStore()
9562 !TLI.isIndexedStoreLegal(ISD::PRE_DEC, VT)) in CombineToPreIndexedLoadStore()
9734 X1 = (AM == ISD::PRE_DEC && !Swapped) ? -1 : 1; in CombineToPreIndexedLoadStore()
9735 Y1 = (AM == ISD::PRE_DEC && Swapped) ? -1 : 1; in CombineToPreIndexedLoadStore()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td864 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
874 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
/external/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp1478 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in SelectARMIndexedLoad()
1552 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in SelectT2IndexedLoad()
DARMISelLowering.cpp11107 AM = isInc ? ISD::PRE_INC : ISD::PRE_DEC; in getPreIndexedAddressParts()
/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp1046 bool IsPre = AM == ISD::PRE_INC || AM == ISD::PRE_DEC; in SelectIndexedLoad()
DAArch64ISelLowering.cpp9778 AM = IsInc ? ISD::PRE_INC : ISD::PRE_DEC; in getPreIndexedAddressParts()