Searched refs:SADDO (Results 1 – 14 of 14) sorted by relevance
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 232 SADDO, UADDO, enumerator
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| D | SelectionDAG.h | 1096 case ISD::SADDO:
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| /external/llvm/test/CodeGen/X86/ |
| D | xaluo.ll | 7 ; SADDO reg, reg
56 ; SADDO reg, 1 | INC
105 ; SADDO reg, imm | imm, reg
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 227 case ISD::SADDO: return "saddo"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 127 case ISD::SADDO: in PromoteIntegerResult()
546 unsigned Opcode = N->getOpcode() == ISD::SADDO ? ISD::ADD : ISD::SUB; in PromoteIntRes_SADDSUBO()
1387 case ISD::SADDO: in ExpandIntegerResult()
2171 SDValue Sum = DAG.getNode(Node->getOpcode() == ISD::SADDO ? in ExpandIntRes_SADDSUBO()
2193 Node->getOpcode() == ISD::SADDO ? in ExpandIntRes_SADDSUBO()
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| D | LegalizeDAG.cpp | 3541 case ISD::SADDO: in ExpandNode()
3545 SDValue Sum = DAG.getNode(Node->getOpcode() == ISD::SADDO ? in ExpandNode()
3566 Node->getOpcode() == ISD::SADDO ? in ExpandNode()
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| D | SelectionDAG.cpp | 2150 case ISD::SADDO: in computeKnownBits()
2611 case ISD::SADDO: in ComputeNumSignBits()
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| D | SelectionDAGBuilder.cpp | 5082 case Intrinsic::sadd_with_overflow: Op = ISD::SADDO; break; in visitIntrinsicCall()
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| D | DAGCombiner.cpp | 2668 return DAG.getNode(ISD::SADDO, SDLoc(N), N->getVTList(), in visitSMULO()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 252 setOperationAction(ISD::SADDO, MVT::i32, Custom); in AArch64TargetLowering()
253 setOperationAction(ISD::SADDO, MVT::i64, Custom); in AArch64TargetLowering()
1556 case ISD::SADDO: in getAArch64XALUOOp()
2272 case ISD::SADDO: in LowerOperation()
3603 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || in LowerBR_CC()
4052 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || in LowerSELECT()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 799 setOperationAction(ISD::SADDO, VT, Expand); in initActions()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1662 setOperationAction(ISD::SADDO, VT, Expand); in HexagonTargetLowering()
1750 ISD::SUBC, ISD::SADDO, ISD::UADDO, ISD::SSUBO, ISD::USUBO, in HexagonTargetLowering()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 717 setOperationAction(ISD::SADDO, MVT::i32, Custom); in ARMTargetLowering()
3400 case ISD::SADDO: in getARMXALUOOp()
3458 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || in LowerSELECT()
6883 case ISD::SADDO: in LowerOperation()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 1757 setOperationAction(ISD::SADDO, VT, Custom); in X86TargetLowering()
14991 CondOpcode == ISD::UADDO || CondOpcode == ISD::SADDO || in LowerSELECT()
15001 case ISD::SADDO: X86Opcode = X86ISD::ADD; X86Cond = X86::COND_O; break; in LowerSELECT()
15470 (Cond.getOperand(0).getOpcode() == ISD::SADDO || in LowerBRCOND()
15526 if (CondOpcode == ISD::UADDO || CondOpcode == ISD::SADDO || in LowerBRCOND()
15540 case ISD::SADDO: in LowerBRCOND()
19064 case ISD::SADDO: in LowerXALUO()
20128 case ISD::SADDO: in LowerOperation()
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