| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 380 SHL_PARTS, SRA_PARTS, SRL_PARTS, enumerator
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 237 case ISD::SRL_PARTS: return "srl_parts"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 2251 PartsOpc = ISD::SRL_PARTS; in ExpandIntRes_Shift()
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| D | LegalizeDAG.cpp | 1374 case ISD::SRL_PARTS: in LegalizeOp()
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| D | SelectionDAG.cpp | 5523 case ISD::SRL_PARTS: in getNode()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 153 ISD::SRA_PARTS, ISD::SRL_PARTS, ISD::ADDC, ISD::ADDE, ISD::SUBC, in WebAssemblyTargetLowering()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 131 setOperationAction(ISD::SRL_PARTS, MVT::i8, Expand); in MSP430TargetLowering()
132 setOperationAction(ISD::SRL_PARTS, MVT::i16, Expand); in MSP430TargetLowering()
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| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 135 setOperationAction(ISD::SRL_PARTS, MVT::i64, Expand); in BPFTargetLowering()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 169 setOperationAction(ISD::SRL_PARTS, MVT::i32 , Custom); in NVPTXTargetLowering()
172 setOperationAction(ISD::SRL_PARTS, MVT::i64 , Custom); in NVPTXTargetLowering()
1692 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); in LowerShiftRightParts()
1832 case ISD::SRL_PARTS: in LowerOperation()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 177 setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom); in R600TargetLowering()
596 case ISD::SRL_PARTS: return LowerSRXParts(Op, DAG); in LowerOperation()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 301 setOperationAction(ISD::SRL_PARTS, MVT::i64, Custom); in MipsTargetLowering()
307 setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom); in MipsTargetLowering()
886 case ISD::SRL_PARTS: return lowerShiftRightParts(Op, DAG, false); in LowerOperation()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1647 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); in SparcTargetLowering()
1664 setOperationAction(ISD::SRL_PARTS, MVT::i64, Expand); in SparcTargetLowering()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 107 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); in XCoreTargetLowering()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 136 setOperationAction(ISD::SRL_PARTS, MVT::i64, Custom); in AArch64TargetLowering()
2311 case ISD::SRL_PARTS: in LowerOperation()
4405 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); in LowerShiftRightParts()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1692 ISD::BSWAP, ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS, in HexagonTargetLowering()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 400 setOperationAction(ISD::SRL_PARTS, MVT::i64, Custom); in PPCTargetLowering()
405 setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom); in PPCTargetLowering()
7990 case ISD::SRL_PARTS: return LowerSRL_PARTS(Op, DAG); in LowerOperation()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 735 setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom); in ARMTargetLowering()
4266 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); in LowerShiftRightParts()
6863 case ISD::SRL_PARTS: in LowerOperation()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 234 setOperationAction(ISD::SRL_PARTS, MVT::i64, Expand); in SystemZTargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 465 setOperationAction(ISD::SRL_PARTS , MVT::i32 , Custom); in X86TargetLowering()
469 setOperationAction(ISD::SRL_PARTS , MVT::i64 , Custom); in X86TargetLowering()
20078 case ISD::SRL_PARTS: return LowerShiftParts(Op, DAG); in LowerOperation()
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