/external/llvm/lib/CodeGen/SelectionDAG/ |
D | TargetLowering.cpp | 620 unsigned ShAmt = SA->getZExtValue(); in SimplifyDemandedBits() local 624 if (ShAmt >= BitWidth) in SimplifyDemandedBits() 632 if (ShAmt && (NewMask & APInt::getLowBitsSet(BitWidth, ShAmt)) == 0) { in SimplifyDemandedBits() 635 int Diff = ShAmt-C1; in SimplifyDemandedBits() 649 if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt), in SimplifyDemandedBits() 659 if (ShAmt < InnerBits && NewMask.lshr(InnerBits) == 0 && in SimplifyDemandedBits() 662 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits())) in SimplifyDemandedBits() 666 TLO.DAG.getConstant(ShAmt, dl, ShTy)); in SimplifyDemandedBits() 683 if (InnerShAmt < ShAmt && in SimplifyDemandedBits() 685 NewMask.lshr(InnerBits - InnerShAmt + ShAmt) == 0 && in SimplifyDemandedBits() [all …]
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D | LegalizeVectorOps.cpp | 572 SDValue Lo, Hi, ShAmt; in ExpandLoad() local 575 ShAmt = DAG.getConstant( in ExpandLoad() 577 Lo = DAG.getNode(ISD::SRL, dl, WideVT, LoadVals[WideIdx], ShAmt); in ExpandLoad() 586 ShAmt = DAG.getConstant( in ExpandLoad() 589 Hi = DAG.getNode(ISD::SHL, dl, WideVT, LoadVals[WideIdx], ShAmt); in ExpandLoad() 606 ShAmt = in ExpandLoad() 609 Lo = DAG.getNode(ISD::SHL, dl, WideVT, Lo, ShAmt); in ExpandLoad() 610 Lo = DAG.getNode(ISD::SRA, dl, WideVT, Lo, ShAmt); in ExpandLoad()
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D | DAGCombiner.cpp | 3564 SDValue ShAmt = DAG.getConstant(16, DL, getShiftAmountTy(VT)); in MatchBSwapHWord() local 3566 return DAG.getNode(ISD::ROTL, DL, VT, BSwap, ShAmt); in MatchBSwapHWord() 3568 return DAG.getNode(ISD::ROTR, DL, VT, BSwap, ShAmt); in MatchBSwapHWord() 3570 DAG.getNode(ISD::SHL, DL, VT, BSwap, ShAmt), in MatchBSwapHWord() 3571 DAG.getNode(ISD::SRL, DL, VT, BSwap, ShAmt)); in MatchBSwapHWord() 4787 uint64_t ShAmt = N1C->getZExtValue() + 64 - BitSize; in visitSRL() local 4790 DAG.getConstant(~0ULL >> ShAmt, DL, VT)); in visitSRL() 4846 unsigned ShAmt = UnknownBits.countTrailingZeros(); in visitSRL() local 4849 if (ShAmt) { in visitSRL() 4852 DAG.getConstant(ShAmt, DL, in visitSRL() [all …]
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D | SelectionDAG.cpp | 2177 unsigned ShAmt = SA->getZExtValue(); in computeKnownBits() local 2180 if (ShAmt >= BitWidth) in computeKnownBits() 2184 KnownZero <<= ShAmt; in computeKnownBits() 2185 KnownOne <<= ShAmt; in computeKnownBits() 2187 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); in computeKnownBits() 2193 unsigned ShAmt = SA->getZExtValue(); in computeKnownBits() local 2196 if (ShAmt >= BitWidth) in computeKnownBits() 2200 KnownZero = KnownZero.lshr(ShAmt); in computeKnownBits() 2201 KnownOne = KnownOne.lshr(ShAmt); in computeKnownBits() 2203 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); in computeKnownBits() [all …]
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/external/llvm/lib/Transforms/InstCombine/ |
D | InstCombineShifts.cpp | 380 Constant *ShAmt = ConstantExpr::getZExt(COp1, TrOp->getType()); in FoldShiftByConstant() local 382 Value *NSh = Builder->CreateBinOp(I.getOpcode(), TrOp, ShAmt,I.getName()); in FoldShiftByConstant() 708 unsigned ShAmt = Op1C->getZExtValue(); in visitShl() local 713 APInt::getHighBitsSet(Op1C->getBitWidth(), ShAmt), in visitShl() 721 ComputeNumSignBits(I.getOperand(0), 0, &I) > ShAmt) { in visitShl() 751 unsigned ShAmt = Op1C->getZExtValue(); in visitLShr() local 761 isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == ShAmt) { in visitLShr() 771 MaskedValueIsZero(Op0, APInt::getLowBitsSet(Op1C->getBitWidth(), ShAmt), in visitLShr() 795 unsigned ShAmt = Op1C->getZExtValue(); in visitAShr() local 816 MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt), in visitAShr()
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D | InstCombineCompares.cpp | 1017 ConstantInt *ShAmt) { in FoldICmpShrCst() argument 1024 uint32_t ShAmtVal = (uint32_t)ShAmt->getLimitedValue(TypeBits); in FoldICmpShrCst() 1361 ConstantInt *ShAmt; in visitICmpInstWithInstAndIntCst() local 1362 ShAmt = Shift ? dyn_cast<ConstantInt>(Shift->getOperand(1)) : nullptr; in visitICmpInstWithInstAndIntCst() 1367 if (ShAmt) { in visitICmpInstWithInstAndIntCst() 1392 cast<ConstantInt>(ConstantExpr::getShl(AndCst, ShAmt)); in visitICmpInstWithInstAndIntCst() 1394 cast<ConstantInt>(ConstantExpr::getShl(RHS, ShAmt)); in visitICmpInstWithInstAndIntCst() 1404 NewCst = ConstantExpr::getLShr(RHS, ShAmt); in visitICmpInstWithInstAndIntCst() 1406 NewCst = ConstantExpr::getShl(RHS, ShAmt); in visitICmpInstWithInstAndIntCst() 1410 if (ConstantExpr::get(ShiftOpcode, NewCst, ShAmt) != RHS) { in visitICmpInstWithInstAndIntCst() [all …]
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D | InstCombineCasts.cpp | 1164 Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize); in visitSExt() local 1165 return BinaryOperator::CreateAShr(Builder->CreateShl(Res, ShAmt, "sext"), in visitSExt() 1166 ShAmt); in visitSExt() 1177 Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize); in visitSExt() local 1178 Value *Res = Builder->CreateShl(TI->getOperand(0), ShAmt, "sext"); in visitSExt() 1179 return BinaryOperator::CreateAShr(Res, ShAmt); in visitSExt() 1206 unsigned ShAmt = CA->getZExtValue()+SrcDstSize-MidSize; in visitSExt() local 1207 Constant *ShAmtV = ConstantInt::get(CI.getType(), ShAmt); in visitSExt()
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D | InstCombineAddSub.cpp | 1102 Constant *ShAmt = ConstantInt::get(I.getType(), ExtendAmt); in visitAdd() local 1103 Value *NewShl = Builder->CreateShl(XorLHS, ShAmt, "sext"); in visitAdd() 1104 return BinaryOperator::CreateAShr(NewShl, ShAmt); in visitAdd()
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D | InstCombineMulDivRem.cpp | 1136 Value *ShAmt = llvm::ConstantInt::get(RHS->getType(), in visitSDiv() local 1138 return BinaryOperator::CreateExactAShr(Op0, ShAmt, I.getName()); in visitSDiv()
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D | InstCombineAndOrXor.cpp | 1609 unsigned ShAmt = in CollectBitParts() local 1612 if (ShAmt > BitValues.size()) in CollectBitParts() 1615 unsigned BitShift = ShAmt; in CollectBitParts()
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/external/llvm/lib/Transforms/Scalar/ |
D | ScalarReplAggregates.cpp | 845 int ShAmt = 0; in ConvertScalar_ExtractValue() local 850 ShAmt = DL.getTypeStoreSizeInBits(NTy) - in ConvertScalar_ExtractValue() 853 ShAmt = Offset; in ConvertScalar_ExtractValue() 859 if (ShAmt > 0 && (unsigned)ShAmt < NTy->getBitWidth()) in ConvertScalar_ExtractValue() 861 ConstantInt::get(FromVal->getType(), ShAmt)); in ConvertScalar_ExtractValue() 862 else if (ShAmt < 0 && (unsigned)-ShAmt < NTy->getBitWidth()) in ConvertScalar_ExtractValue() 864 ConstantInt::get(FromVal->getType(), -ShAmt)); in ConvertScalar_ExtractValue() 994 int ShAmt = 0; in ConvertScalar_InsertValue() local 999 ShAmt = DestStoreWidth - SrcStoreWidth - Offset; in ConvertScalar_InsertValue() 1001 ShAmt = Offset; in ConvertScalar_InsertValue() [all …]
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D | SROA.cpp | 2035 uint64_t ShAmt = 8 * Offset; in extractInteger() local 2037 ShAmt = 8 * (DL.getTypeStoreSize(IntTy) - DL.getTypeStoreSize(Ty) - Offset); in extractInteger() 2038 if (ShAmt) { in extractInteger() 2039 V = IRB.CreateLShr(V, ShAmt, Name + ".shift"); in extractInteger() 2064 uint64_t ShAmt = 8 * Offset; in insertInteger() local 2066 ShAmt = 8 * (DL.getTypeStoreSize(IntTy) - DL.getTypeStoreSize(Ty) - Offset); in insertInteger() 2067 if (ShAmt) { in insertInteger() 2068 V = IRB.CreateShl(V, ShAmt, Name + ".shift"); in insertInteger() 2072 if (ShAmt || Ty->getBitWidth() < IntTy->getBitWidth()) { in insertInteger() 2073 APInt Mask = ~Ty->getMask().zext(IntTy->getBitWidth()).shl(ShAmt); in insertInteger()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 96 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt); 473 unsigned ShAmt) { in isShifterOpProfitable() argument 480 (ShAmt == 2 || (Subtarget->isSwift() && ShAmt == 1)); in isShifterOpProfitable() 673 unsigned ShAmt = Log2_32(RHSC); in SelectLdStSOReg() local 675 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, in SelectLdStSOReg() 701 unsigned ShAmt = 0; in SelectLdStSOReg() local 711 ShAmt = Sh->getZExtValue(); in SelectLdStSOReg() 712 if (isShifterOpProfitable(Offset, ShOpcVal, ShAmt)) in SelectLdStSOReg() 715 ShAmt = 0; in SelectLdStSOReg() 733 ShAmt = Sh->getZExtValue(); in SelectLdStSOReg() [all …]
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D | ARMBaseInstrInfo.cpp | 3485 unsigned ShAmt = DefMI->getOperand(3).getImm(); in adjustDefLatency() local 3486 if (ShAmt == 0 || ShAmt == 2) in adjustDefLatency() 3516 unsigned ShAmt = DefMI->getOperand(3).getImm(); in adjustDefLatency() local 3517 if (ShAmt == 0 || ShAmt == 1 || ShAmt == 2 || ShAmt == 3) in adjustDefLatency() 3787 unsigned ShAmt = in getOperandLatency() local 3789 if (ShAmt == 0 || ShAmt == 2) in getOperandLatency()
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D | ARMISelLowering.cpp | 4262 SDValue ShAmt = Op.getOperand(2); in LowerShiftRightParts() local 4269 DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerShiftRightParts() 4270 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts() 4271 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftRightParts() 4280 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts() 4298 SDValue ShAmt = Op.getOperand(2); in LowerShiftLeftParts() local 4303 DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerShiftLeftParts() 4305 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftLeftParts() 4307 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts() 4314 SDValue Lo = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); in LowerShiftLeftParts() [all …]
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/external/clang/lib/Lex/ |
D | PPExpressions.cpp | 607 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue()); in EvaluateDirectiveSubExpr() local 608 if (ShAmt >= LHS.getBitWidth()) in EvaluateDirectiveSubExpr() 609 Overflow = true, ShAmt = LHS.getBitWidth()-1; in EvaluateDirectiveSubExpr() 610 Res = LHS.Val >> ShAmt; in EvaluateDirectiveSubExpr()
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/external/llvm/lib/IR/ |
D | ConstantFold.cpp | 270 unsigned ShAmt = Amt->getZExtValue(); in ExtractConstantBytes() local 272 if ((ShAmt & 7) != 0) in ExtractConstantBytes() 274 ShAmt >>= 3; in ExtractConstantBytes() 277 if (ByteStart >= CSize-ShAmt) in ExtractConstantBytes() 281 if (ByteStart+ByteSize+ShAmt <= CSize) in ExtractConstantBytes() 282 return ExtractConstantBytes(CE->getOperand(0), ByteStart+ShAmt, ByteSize); in ExtractConstantBytes() 292 unsigned ShAmt = Amt->getZExtValue(); in ExtractConstantBytes() local 294 if ((ShAmt & 7) != 0) in ExtractConstantBytes() 296 ShAmt >>= 3; in ExtractConstantBytes() 299 if (ByteStart+ByteSize <= ShAmt) in ExtractConstantBytes() [all …]
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/external/llvm/lib/Support/ |
D | APInt.cpp | 2057 APInt APInt::sshl_ov(const APInt &ShAmt, bool &Overflow) const { in sshl_ov() argument 2058 Overflow = ShAmt.uge(getBitWidth()); in sshl_ov() 2063 Overflow = ShAmt.uge(countLeadingZeros()); in sshl_ov() 2065 Overflow = ShAmt.uge(countLeadingOnes()); in sshl_ov() 2067 return *this << ShAmt; in sshl_ov() 2070 APInt APInt::ushl_ov(const APInt &ShAmt, bool &Overflow) const { in ushl_ov() argument 2071 Overflow = ShAmt.uge(getBitWidth()); in ushl_ov() 2075 Overflow = ShAmt.ugt(countLeadingZeros()); in ushl_ov() 2077 return *this << ShAmt; in ushl_ov()
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 1699 SDValue ShAmt = Op.getOperand(2); in LowerShiftRightParts() local 1709 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts() 1711 ShAmt); in LowerShiftRightParts() 1728 ShAmt); in LowerShiftRightParts() 1729 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts() 1730 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftRightParts() 1736 SDValue Cmp = DAG.getSetCC(dl, MVT::i1, ShAmt, in LowerShiftRightParts() 1739 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts() 1762 SDValue ShAmt = Op.getOperand(2); in LowerShiftLeftParts() local 1772 ShAmt); in LowerShiftLeftParts() [all …]
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/external/llvm/lib/Target/ARM/InstPrinter/ |
D | ARMInstPrinter.cpp | 1344 unsigned ShAmt = MO3.getImm(); in printT2AddrModeSoRegOperand() local 1345 if (ShAmt) { in printT2AddrModeSoRegOperand() 1346 assert(ShAmt <= 3 && "Not a valid Thumb2 addressing mode!"); in printT2AddrModeSoRegOperand() 1347 O << ", lsl " << markup("<imm:") << "#" << ShAmt << markup(">"); in printT2AddrModeSoRegOperand()
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/external/llvm/lib/Target/X86/ |
D | X86InstrInfo.cpp | 2530 inline static bool isTruncatedShiftCountForLEA(unsigned ShAmt) { in isTruncatedShiftCountForLEA() argument 2536 return ShAmt < 4 && ShAmt > 0; in isTruncatedShiftCountForLEA() 2653 unsigned ShAmt = MI->getOperand(2).getImm(); in convertToThreeAddressWithLEA() local 2654 MIB.addReg(0).addImm(1 << ShAmt) in convertToThreeAddressWithLEA() 2758 unsigned ShAmt = getTruncatedShiftCount(MI, 2); in convertToThreeAddress() local 2759 if (!isTruncatedShiftCountForLEA(ShAmt)) return nullptr; in convertToThreeAddress() 2769 .addReg(0).addImm(1 << ShAmt).addOperand(Src).addImm(0).addReg(0); in convertToThreeAddress() 2774 unsigned ShAmt = getTruncatedShiftCount(MI, 2); in convertToThreeAddress() local 2775 if (!isTruncatedShiftCountForLEA(ShAmt)) return nullptr; in convertToThreeAddress() 2789 .addReg(0).addImm(1 << ShAmt) in convertToThreeAddress() [all …]
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D | X86ISelLowering.cpp | 12467 SDValue ShAmt = Op.getOperand(2); in LowerShiftParts() local 12471 SDValue SafeShAmt = DAG.getNode(ISD::AND, dl, MVT::i8, ShAmt, in LowerShiftParts() 12479 Tmp2 = DAG.getNode(X86ISD::SHLD, dl, VT, ShOpHi, ShOpLo, ShAmt); in LowerShiftParts() 12482 Tmp2 = DAG.getNode(X86ISD::SHRD, dl, VT, ShOpLo, ShOpHi, ShAmt); in LowerShiftParts() 12489 SDValue AndNode = DAG.getNode(ISD::AND, dl, MVT::i8, ShAmt, in LowerShiftParts() 13888 unsigned ShAmt = Op->getConstantOperandVal(1); in EmitTest() local 13889 if (ShAmt >= BitWidth) // Avoid undefined shifts. in EmitTest() 13892 ? APInt::getHighBitsSet(BitWidth, BitWidth - ShAmt) in EmitTest() 13893 : APInt::getLowBitsSet(BitWidth, BitWidth - ShAmt); in EmitTest() 16050 SDValue SrcOp, SDValue ShAmt, in getTargetVShiftNode() argument [all …]
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/external/llvm/include/llvm/IR/ |
D | IRBuilder.h | 1722 uint64_t ShAmt = 8 * Offset; in CreateExtractInteger() local 1725 ShAmt = 8 * (DL.getTypeStoreSize(IntTy) - in CreateExtractInteger() 1727 if (ShAmt) { in CreateExtractInteger() 1728 V = CreateLShr(V, ShAmt, Name + ".shift"); in CreateExtractInteger()
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/external/llvm/lib/Analysis/ |
D | ValueTracking.cpp | 2221 const APInt *ShAmt; in ComputeNumSignBits() local 2222 if (match(U->getOperand(1), m_APInt(ShAmt))) { in ComputeNumSignBits() 2223 Tmp += ShAmt->getZExtValue(); in ComputeNumSignBits() 2229 const APInt *ShAmt; in ComputeNumSignBits() local 2230 if (match(U->getOperand(1), m_APInt(ShAmt))) { in ComputeNumSignBits() 2233 Tmp2 = ShAmt->getZExtValue(); in ComputeNumSignBits()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 4402 SDValue ShAmt = Op.getOperand(2); in LowerShiftRightParts() local 4408 DAG.getConstant(VTBits, dl, MVT::i64), ShAmt); in LowerShiftRightParts() 4413 SDValue Cmp = emitComparison(ShAmt, DAG.getConstant(0, dl, MVT::i64), in LowerShiftRightParts() 4420 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i64, ShAmt, in LowerShiftRightParts() 4423 SDValue LoBitsForLo = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts() 4436 SDValue HiForNormalShift = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts() 4460 SDValue ShAmt = Op.getOperand(2); in LowerShiftLeftParts() local 4464 DAG.getConstant(VTBits, dl, MVT::i64), ShAmt); in LowerShiftLeftParts() 4469 SDValue Cmp = emitComparison(ShAmt, DAG.getConstant(0, dl, MVT::i64), in LowerShiftLeftParts() 4476 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i64, ShAmt, in LowerShiftLeftParts() [all …]
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