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Searched refs:TGSI_OPCODE_XOR (Results 1 – 11 of 11) sorted by relevance

/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_info.c132 { 1, 2, 0, 0, 0, 0, COMP, "XOR", TGSI_OPCODE_XOR },
276 case TGSI_OPCODE_XOR: in tgsi_opcode_infer_src_type()
325 case TGSI_OPCODE_XOR: in tgsi_opcode_infer_dst_type()
Dtgsi_util.c218 case TGSI_OPCODE_XOR: in tgsi_util_get_inst_usage_mask()
Dtgsi_exec.c3922 case TGSI_OPCODE_XOR: in exec_instruction()
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h347 #define TGSI_OPCODE_XOR 92 macro
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_aos.c932 case TGSI_OPCODE_XOR: in lp_emit_instruction_aos()
Dlp_bld_tgsi_action.c1625 bld_base->op_actions[TGSI_OPCODE_XOR].emit = xor_emit_cpu; in lp_set_default_actions_cpu()
/external/mesa3d/src/gallium/drivers/nv50/codegen/
Dnv50_ir_from_tgsi.cpp366 case TGSI_OPCODE_XOR: in inferSrcType()
1774 case TGSI_OPCODE_XOR: in handleInstruction()
/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_setup_tgsi_llvm.c1059 bld_base->op_actions[TGSI_OPCODE_XOR].emit = emit_xor; in radeon_llvm_context_init()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_shader.c5338 {TGSI_OPCODE_XOR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT, tgsi_op2},
5512 {TGSI_OPCODE_XOR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT, tgsi_op2},
5686 {TGSI_OPCODE_XOR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT, tgsi_op2},
/external/mesa3d/src/mesa/state_tracker/
Dst_glsl_to_tgsi.cpp1690 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]); in visit()
1867 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]); in visit()
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_tgsi_insn.c2661 case TGSI_OPCODE_XOR: in svga_emit_instruction()