| /external/llvm/lib/Target/ARM/ |
| D | A15SDOptimizer.cpp | 79 const TargetRegisterClass *TRC);
103 bool usesRegClass(MachineOperand &MO, const TargetRegisterClass *TRC);
139 const TargetRegisterClass *TRC) { in usesRegClass() argument
145 return MRI->getRegClass(Reg)->hasSuperClassEq(TRC); in usesRegClass()
147 return TRC->contains(Reg); in usesRegClass()
281 const TargetRegisterClass *TRC = in optimizeSDPattern() local
283 if (TRC->hasSuperClassEq(MRI->getRegClass(FullReg))) { in optimizeSDPattern()
453 const TargetRegisterClass *TRC) { in createExtractSubreg() argument
454 unsigned Out = MRI->createVirtualRegister(TRC); in createExtractSubreg()
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| D | ARMISelLowering.cpp | 6965 const TargetRegisterClass *TRC = isThumb ? &ARM::tGPRRegClass in SetupEntryBlockForSjLj() local
6984 unsigned NewVReg1 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj()
6989 unsigned NewVReg2 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj()
6994 unsigned NewVReg3 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj()
7011 unsigned NewVReg1 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj()
7015 unsigned NewVReg2 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj()
7020 unsigned NewVReg3 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj()
7024 unsigned NewVReg4 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj()
7029 unsigned NewVReg5 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj()
7043 unsigned NewVReg1 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj()
[all …]
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| D | ARMLoadStoreOptimizer.cpp | 2183 const TargetRegisterClass *TRC = TII->getRegClass(MCID, 0, TRI, *MF); in RescheduleOps() local
2184 MRI->constrainRegClass(FirstReg, TRC); in RescheduleOps()
2185 MRI->constrainRegClass(SecondReg, TRC); in RescheduleOps()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyAsmPrinter.cpp | 93 const TargetRegisterClass *TRC = in getRegType() local
98 if (TRC->hasType(T)) in getRegType()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 492 const TargetRegisterClass *TRC = in EmitSubregNode() local
501 TRC == MRI->getRegClass(SrcReg)) { in EmitSubregNode()
507 VRBase = MRI->createVirtualRegister(TRC); in EmitSubregNode()
521 VRBase = MRI->createVirtualRegister(TRC); in EmitSubregNode()
626 const TargetRegisterClass *TRC = MRI->getRegClass(SubReg); in EmitRegSequence() local
628 TRI->getMatchingSuperRegClass(RC, TRC, SubIdx); in EmitRegSequence()
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| /external/llvm/lib/CodeGen/ |
| D | MachineRegisterInfo.cpp | 400 const TargetRegisterClass &TRC = *getRegClass(Reg); in getMaxLaneMaskForVReg() local
401 return TRC.getLaneMask(); in getMaxLaneMaskForVReg()
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| D | RegAllocPBQP.cpp | 569 const TargetRegisterClass *TRC = MRI.getRegClass(VReg); in initializeGraph() local
578 ArrayRef<MCPhysReg> RawPRegOrder = TRC->getRawAllocationOrder(MF); in initializeGraph()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 2812 const TargetRegisterClass *TRC; in Select() local
2814 case MVT::i32: TRC = &X86::GR32_ABCDRegClass; break; in Select()
2815 case MVT::i16: TRC = &X86::GR16_ABCDRegClass; break; in Select()
2818 SDValue RC = CurDAG->getTargetConstant(TRC->getID(), dl, MVT::i32); in Select()
2847 const TargetRegisterClass *TRC; in Select() local
2849 case MVT::i64: TRC = &X86::GR64_ABCDRegClass; break; in Select()
2850 case MVT::i32: TRC = &X86::GR32_ABCDRegClass; break; in Select()
2851 case MVT::i16: TRC = &X86::GR16_ABCDRegClass; break; in Select()
2854 SDValue RC = CurDAG->getTargetConstant(TRC->getID(), dl, MVT::i32); in Select()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.cpp | 1434 const TargetRegisterClass *TRC; in createVR() local
1436 TRC = &Hexagon::PredRegsRegClass; in createVR()
1438 TRC = &Hexagon::IntRegsRegClass; in createVR()
1440 TRC = &Hexagon::DoubleRegsRegClass; in createVR()
1445 unsigned NewReg = MRI.createVirtualRegister(TRC); in createVR()
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| /external/clang/lib/Sema/ |
| D | SemaLookup.cpp | 4695 TypoDiagnosticGenerator TDG, TypoRecoveryCallback TRC, CorrectTypoKind Mode, in CorrectTypoDelayed() argument
4716 return createDelayedTypo(std::move(Consumer), std::move(TDG), std::move(TRC)); in CorrectTypoDelayed()
4974 TypoRecoveryCallback TRC) { in createDelayedTypo() argument
4980 State.RecoveryHandler = std::move(TRC); in createDelayedTypo()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 207 const TargetRegisterClass *TRC = TRI->getPointerRegClass(*MF, /*Kind=*/1); in SelectInlineAsmMemoryOperand() local
209 SDValue RC = CurDAG->getTargetConstant(TRC->getID(), dl, MVT::i32); in SelectInlineAsmMemoryOperand()
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| /external/clang/include/clang/Sema/ |
| D | Sema.h | 2734 TypoRecoveryCallback TRC);
2848 TypoRecoveryCallback TRC, CorrectTypoKind Mode,
|