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Searched refs:UNDEF (Results 1 – 25 of 63) sorted by relevance

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/external/elfutils/tests/
Drun-readelf-s.sh130 0: 0000000000000000 0 NOTYPE LOCAL DEFAULT UNDEF
132 2: 0000000000000000 0 NOTYPE WEAK DEFAULT UNDEF _ITM_deregisterTMCloneTable
133 3: 0000000000000000 0 FUNC GLOBAL DEFAULT UNDEF __libc_start_main@GLIBC_2.2.5 (2)
134 4: 0000000000000000 0 NOTYPE WEAK DEFAULT UNDEF __gmon_start__
135 5: 0000000000000000 0 NOTYPE WEAK DEFAULT UNDEF _Jv_RegisterClasses
136 6: 0000000000000000 0 NOTYPE WEAK DEFAULT UNDEF _ITM_registerTMCloneTable
137 7: 0000000000000000 0 FUNC WEAK DEFAULT UNDEF __cxa_finalize@GLIBC_2.2.5 (2)
151 0: 0000000000000000 0 NOTYPE LOCAL DEFAULT UNDEF
206 55: 0000000000000000 0 NOTYPE WEAK DEFAULT UNDEF _ITM_deregisterTMCloneTable
211 60: 0000000000000000 0 FUNC GLOBAL DEFAULT UNDEF __libc_start_main@@GLIBC_2.2.5
[all …]
/external/mesa3d/src/glsl/glcpp/tests/
D076-elif-undef-nested.c1 #ifdef UNDEF
2 #if UNDEF == 4
3 #elif UNDEF == 5
D075-elif-elif-undef.c1 #ifndef UNDEF
2 #elif UNDEF < 0
3 #elif UNDEF == 3
D073-if-in-ifdef.c1 #ifdef UNDEF
2 #if UNDEF > 1
D074-elif-undef.c1 #ifndef UNDEF
2 #elif UNDEF < 0
/external/llvm/test/MC/ARM/
Dthumb2-bxj-v8.s1 …t llvm-mc -triple=thumbv6t2--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=UNDEF
2 …t llvm-mc -triple=thumbv7a--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=UNDEF
3 …t llvm-mc -triple=thumbv7r--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=UNDEF
10 @ UNDEF: error: r13 (SP) is an unpredictable operand to BXJ
Dcps.s5 …ot llvm-mc -triple=thumbv7m--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=UNDEF
15 @ UNDEF-DAG: cpsie f @ encoding: [0x61,0xb6]
16 @ UNDEF-DAG: error: instruction requires:
17 @ UNDEF-DAG: error: instruction 'cps' requires effect for M-class
Dthumb2-ldrexd-strexd.s5 …ot llvm-mc -triple=thumbv7m--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=UNDEF
13 @ UNDEF: error: instruction requires: !armv*m
14 @ UNDEF: error: instruction requires: !armv*m
Dthumb2-bxj.s5 …ot llvm-mc -triple=thumbv7m--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=UNDEF
10 @ UNDEF: error: instruction requires: arm-mode
/external/c-ares/
DMakefile.am98 UNDEF = -no-undefined macro
101 libcares_la_LDFLAGS = $(UNDEF) $(VER)
/external/llvm/test/tools/gold/X86/
Demit-llvm.ll90 ; API: g7 UNDEF
91 ; API: g8 UNDEF
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAG.cpp109 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) in isBuildVectorAllOnes()
139 N->getOperand(i).getOpcode() != ISD::UNDEF) in isBuildVectorAllOnes()
156 if (Op.getOpcode() == ISD::UNDEF) in isBuildVectorAllZeros()
191 if (Op.getOpcode() == ISD::UNDEF) in isBuildVectorOfConstantSDNodes()
206 if (Op.getOpcode() == ISD::UNDEF) in isBuildVectorOfConstantFPSDNodes()
224 if (Op.getOpcode() != ISD::UNDEF) in allOperandsUndef()
1502 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) in getVectorShuffle()
1522 if (N1.getOpcode() == ISD::UNDEF) in getVectorShuffle()
1556 bool N2Undef = N2.getOpcode() == ISD::UNDEF; in getVectorShuffle()
1576 N2Undef = N2.getOpcode() == ISD::UNDEF; in getVectorShuffle()
[all …]
DDAGCombiner.cpp1656 if (N0.getOpcode() == ISD::UNDEF) in visitADD()
1658 if (N1.getOpcode() == ISD::UNDEF) in visitADD()
1936 if (N0.getOpcode() == ISD::UNDEF) in visitSUB()
1938 if (N1.getOpcode() == ISD::UNDEF) in visitSUB()
2016 if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF) in visitMUL()
2317 if (N0.getOpcode() == ISD::UNDEF) in visitSDIV()
2320 if (N1.getOpcode() == ISD::UNDEF) in visitSDIV()
2381 if (N0.getOpcode() == ISD::UNDEF) in visitUDIV()
2384 if (N1.getOpcode() == ISD::UNDEF) in visitUDIV()
2465 if (N0.getOpcode() == ISD::UNDEF) in visitREM()
[all …]
DSelectionDAGDumper.cpp145 case ISD::UNDEF: return "undef"; in getOperationName()
/external/llvm/test/CodeGen/AArch64/
Darm64-EXT-undef-mask.ll3 ; The following 2 test cases test shufflevector with beginning UNDEF mask.
/external/boringssl/src/crypto/x509v3/
Dv3_info.c196 #ifdef UNDEF in i2a_ACCESS_DESCRIPTION()
/external/llvm/test/CodeGen/X86/
Dshift-combine-crash.ll4 ; attempt to cast a ISD::UNDEF node to a ConstantSDNode.
Dpalignr.ll137 ; was an UNDEF.)
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h173 UNDEF, enumerator
/external/mesa3d/src/gallium/drivers/radeon/
DAMDILISelLowering.cpp383 if (fourth.getOpcode() != ISD::UNDEF) { in LowerBUILD_VECTOR()
394 if (third.getOpcode() != ISD::UNDEF) { in LowerBUILD_VECTOR()
405 if (second.getOpcode() != ISD::UNDEF) { in LowerBUILD_VECTOR()
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp288 setOperationAction(ISD::UNDEF, VT, Legal); in SystemZTargetLowering()
3670 } else if (Op.getOpcode() == ISD::UNDEF) { in add()
3773 if (Op.getOperand(I).getOpcode() != ISD::UNDEF) in isScalarToVector()
3789 if (Value.getOpcode() == ISD::UNDEF) in buildScalarToVector()
3798 if (Op0.getOpcode() == ISD::UNDEF) { in buildMergeScalars()
3799 if (Op1.getOpcode() == ISD::UNDEF) in buildMergeScalars()
3803 if (Op1.getOpcode() == ISD::UNDEF) in buildMergeScalars()
3814 if (Op0.getOpcode() == ISD::UNDEF && Op1.getOpcode() == ISD::UNDEF) in joinDwords()
3818 if (Op0.getOpcode() == ISD::UNDEF) in joinDwords()
3820 else if (Op1.getOpcode() == ISD::UNDEF) in joinDwords()
[all …]
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp570 setOperationAction(ISD::UNDEF, MVT::f64, Expand); in X86TargetLowering()
599 setOperationAction(ISD::UNDEF, MVT::f64, Expand); in X86TargetLowering()
600 setOperationAction(ISD::UNDEF, MVT::f32, Expand); in X86TargetLowering()
637 setOperationAction(ISD::UNDEF, MVT::f80, Expand); in X86TargetLowering()
4444 if (Vec.getOpcode() == ISD::UNDEF) in ExtractSubVector()
4490 if (Vec.getOpcode() == ISD::UNDEF) in InsertSubVector()
4524 Result.getOpcode() != ISD::UNDEF) { in Insert128BitVector()
4813 if (Op->getOpcode() == ISD::UNDEF) { in getTargetShuffleMask()
4908 if (Op->getOpcode() == ISD::UNDEF) in getTargetShuffleMask()
4972 if (Op->getOpcode() == ISD::UNDEF) in getTargetShuffleMask()
[all …]
/external/llvm/test/CodeGen/ARM/
Dinterrupt-attr.ll89 define arm_aapcscc void @undef_fn() alignstack(8) "interrupt"="UNDEF" {
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp2098 if (V2.getOpcode() == ISD::UNDEF) in LowerVECTOR_SHUFFLE()
2116 if (V1.getOperand(i).getOpcode() != ISD::UNDEF) { in LowerVECTOR_SHUFFLE()
2238 if (V0.getOpcode() == ISD::UNDEF) in LowerBUILD_VECTOR()
2240 if (V1.getOpcode() == ISD::UNDEF) in LowerBUILD_VECTOR()
2260 if (BVN->getOperand(i).getOpcode() == ISD::UNDEF) in LowerBUILD_VECTOR()
2288 if (Operand.getOpcode() == ISD::UNDEF) in LowerBUILD_VECTOR()
/external/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp1735 if (NewBldVec[i].getOpcode() == ISD::UNDEF) in CompactSwizzlableVector()
1750 if (NewBldVec[i].getOpcode() == ISD::UNDEF) in CompactSwizzlableVector()
1889 if (InVal.getOpcode() == ISD::UNDEF) in PerformDAGCombine()
1910 } else if (InVec.getOpcode() == ISD::UNDEF) { in PerformDAGCombine()

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