| /external/clang/test/CXX/except/except.spec/ |
| D | p14-ir.cpp | 50 struct X7 { struct
51 X7();
55 struct X9 : X6, X7 { };
|
| /external/clang/test/CodeGen/ |
| D | override-layout.c | 68 struct X7 { struct
73 void use_X7() { struct X7 x7; x7.y = x7.x = sizeof(struct X7); } in use_X7() argument
77 struct X7 x;
|
| /external/clang/test/SemaTemplate/ |
| D | temp_explicit.cpp | 131 template<typename T> struct X7 { }; // expected-note{{here}} struct
137 template struct X7<int>; variable
148 template struct X7<double>; // expected-warning{{must occur in namespace}} variable
|
| D | instantiate-expr-1.cpp | 149 typedef X<7> X7; typedef
151 void f() { X7(); } // expected-note{{instantiation}} in f()
|
| D | instantiate-function-1.cpp | 86 template <typename T> struct X7 { struct
92 template struct X7<int>; argument
|
| D | default-arguments.cpp | 127 template<template<class> class X = B<int> > struct X7; // expected-error{{must be a class template}}
|
| /external/boringssl/src/crypto/md4/ |
| D | md4.c | 128 uint32_t X0, X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15; in md4_block_data_order() local
158 X7 = l; in md4_block_data_order()
162 R0(B, C, D, A, X7, 19, 0); in md4_block_data_order()
199 R1(D, A, B, C, X7, 5, 0x5A827999L); in md4_block_data_order()
217 R2(C, D, A, B, X7, 11, 0x6ED9EBA1L); in md4_block_data_order()
|
| /external/clang/test/CXX/expr/expr.unary/expr.new/ |
| D | p20.cpp | 130 struct X7 {
138 new X7<1>;
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64CallingConvention.td | 54 [X0, X1, X2, X3, X4, X5, X6, X7]>>,
55 // i128 is split to two i64s, we can't fit half to register X7.
60 CCIfType<[i64], CCIfSplit<CCAssignToStackWithShadow<8, 16, [X7]>>>,
62 CCIfType<[i64], CCAssignToRegWithShadow<[X0, X1, X2, X3, X4, X5, X6, X7],
97 [X0, X1, X2, X3, X4, X5, X6, X7]>>,
98 CCIfType<[i64], CCAssignToRegWithShadow<[X0, X1, X2, X3, X4, X5, X6, X7],
135 [X0, X1, X2, X3, X4, X5, X6, X7]>>,
136 // i128 is split to two i64s, we can't fit half to register X7.
141 CCIfType<[i64], CCIfSplit<CCAssignToStackWithShadow<8, 16, [X7]>>>,
143 CCIfType<[i64], CCAssignToRegWithShadow<[X0, X1, X2, X3, X4, X5, X6, X7],
[all …]
|
| D | AArch64CallingConvention.h | 30 AArch64::X6, AArch64::X7};
|
| /external/llvm/lib/LibDriver/ |
| D | LibDriver.cpp | 43 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X6, X7, X8, X9, X10) \ argument
45 X1, X2, X9, X10, OPT_##ID, llvm::opt::Option::KIND##Class, X8, X7, \
|
| /external/clang/test/SemaCXX/ |
| D | new-delete.cpp | 188 class X7 { class
193 class X8 : public X6, public X7 {
|
| /external/clang/test/Parser/ |
| D | missing-end-4.m | 18 @interface X7 // expected-error {{missing '@end'}}
|
| /external/webrtc/data/voice_engine/stereo_rtp_files/ |
| D | toggling_stereo_g729_pt18_pt125.rtp | 113 … ��������εI��X���\w�p{z� ���������I��X)���I��� ���������UI��X7 � �qe�K� ������…
119 …������I��X�k�pD� ���������EI��X����֢ps�� �������ߕI��Xy��}�CqLǑ� ���������I��X7
126 �I��X�i��X� N��i��X� N��(� �� �}I�� I��X���cp�L��H���cp�L��H�(� �� "�}J�� UI��X7�������7�����…
300 %[S� ���Y�(���I��X7
338 …$�] �=ht$�] ��(� ��k�}���j�I��Xhc��Wu� -hc��Wu� -�(� ��k�}���j�I��X7(�M�J�J�7(�M�J�J��(� …
340 …%U�� �=b2�%U�� ��(� ��l�}���rUI��X42r���~f42r���~f�(� ��l �}���r�I��X72�T�V�&g72�T�V�&g�(…
420 …X7*m=�5�Jw7*m=�5�Jw�(� ���܀}����%I��X<���\�rNt�<���\�rNt��(� ����}����uI��X7�����n̛7�����n̛�…
457 …��2֧�(� ���n�} ����I��X�4t��������4t��������(� ���x�} ���I��X7�`ĸ�d��7�`ĸ�d���(� �����} ���…
470 ��(%I��X Bg��R�V� Bg��R�V��(� ���ƀ} ��(uI��X8���2B�6X8���2B�6X�(� ���Ѐ} ��(�I��X7"#�*;"�}7"#…
|
| /external/clang/test/Index/ |
| D | annotate-nested-name-specifier.cpp | 123 struct X7 { struct
|
| /external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/es-ES/ |
| D | es-ES_zl0_kdt_lfz1.pkb | 27 W��}dX7��0��5`:s�۠�
|
| /external/libjpeg-turbo/simd/ |
| D | jdcolext-mmx.asm | 303 pcmpeqb mm7,mm7 ; mm7=(X1 X3 X5 X7 ** ** ** **)
306 pxor mm7,mm7 ; mm7=(X1 X3 X5 X7 ** ** ** **)
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-arithmetic-encoding.s | 578 CSEL X7, X7, X3, VC
579 CSEL X6, X7, X4, HI
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 39 case AArch64::X7: return AArch64::W7; in getWRegFromXReg()
79 case AArch64::W7: return AArch64::X7; in getXRegFromWReg()
|
| /external/valgrind/VEX/auxprogs/ |
| D | genoffsets.c | 172 GENOFFSET(ARM64,arm64,X7); in foo()
|
| /external/guava/guava-tests/benchmark/com/google/common/base/ |
| D | EnumsBenchmark.java | 79 X0, X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, enumConstant
88 X0, X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, enumConstant
|
| /external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/de-DE/ |
| D | de-DE_kdt_posd.pkb | 197 ��� t77X7�`�`�ԸX�@!2٤>Z�c�ԣw5��XG0� @P엄"���2[���0�‚l���*���ǀO� �����i�jr
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstr64Bit.td | 936 Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
945 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
968 Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
977 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
|
| D | PPCCallingConv.td | 97 CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6, X7, X8, X9, X10]>>,
|
| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 187 PPC::X4, PPC::X5, PPC::X6, PPC::X7,
|