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/external/libhevc/
Ddecoder.arm.mk1 libhevcd_inc_dir_arm += $(LOCAL_PATH)/decoder/arm
2 libhevcd_inc_dir_arm += $(LOCAL_PATH)/common/arm
4 libhevcd_srcs_c_arm += decoder/arm/ihevcd_function_selector.c
5 libhevcd_srcs_c_arm += decoder/arm/ihevcd_function_selector_noneon.c
8 LOCAL_ARM_MODE := arm
11 libhevcd_srcs_c_arm += decoder/arm/ihevcd_function_selector_a9q.c
12 libhevcd_srcs_c_arm += common/arm/ihevc_intra_ref_substitution_a9q.c
13 libhevcd_srcs_c_arm += common/arm/ihevc_intra_pred_filters_neon_intr.c
14 libhevcd_srcs_c_arm += common/arm/ihevc_weighted_pred_neon_intr.c
16 libhevcd_srcs_asm_arm += common/arm/ihevc_mem_fns.s
[all …]
/external/valgrind/coregrind/m_gdbserver/
Dvalgrind-low-arm64.c147 VexGuestARM64State* arm = (VexGuestARM64State*) get_arch (set, tst); in transfer_register() local
152 case 0: VG_(transfer) (&arm->guest_X0, buf, dir, size, mod); break; in transfer_register()
153 case 1: VG_(transfer) (&arm->guest_X1, buf, dir, size, mod); break; in transfer_register()
154 case 2: VG_(transfer) (&arm->guest_X2, buf, dir, size, mod); break; in transfer_register()
155 case 3: VG_(transfer) (&arm->guest_X3, buf, dir, size, mod); break; in transfer_register()
156 case 4: VG_(transfer) (&arm->guest_X4, buf, dir, size, mod); break; in transfer_register()
157 case 5: VG_(transfer) (&arm->guest_X5, buf, dir, size, mod); break; in transfer_register()
158 case 6: VG_(transfer) (&arm->guest_X6, buf, dir, size, mod); break; in transfer_register()
159 case 7: VG_(transfer) (&arm->guest_X7, buf, dir, size, mod); break; in transfer_register()
160 case 8: VG_(transfer) (&arm->guest_X8, buf, dir, size, mod); break; in transfer_register()
[all …]
Dvalgrind-low-arm.c186 VexGuestARMState* arm = (VexGuestARMState*) get_arch (set, tst); in transfer_register() local
191 case 0: VG_(transfer) (&arm->guest_R0, buf, dir, size, mod); break; in transfer_register()
192 case 1: VG_(transfer) (&arm->guest_R1, buf, dir, size, mod); break; in transfer_register()
193 case 2: VG_(transfer) (&arm->guest_R2, buf, dir, size, mod); break; in transfer_register()
194 case 3: VG_(transfer) (&arm->guest_R3, buf, dir, size, mod); break; in transfer_register()
195 case 4: VG_(transfer) (&arm->guest_R4, buf, dir, size, mod); break; in transfer_register()
196 case 5: VG_(transfer) (&arm->guest_R5, buf, dir, size, mod); break; in transfer_register()
197 case 6: VG_(transfer) (&arm->guest_R6, buf, dir, size, mod); break; in transfer_register()
198 case 7: VG_(transfer) (&arm->guest_R7, buf, dir, size, mod); break; in transfer_register()
199 case 8: VG_(transfer) (&arm->guest_R8, buf, dir, size, mod); break; in transfer_register()
[all …]
/external/compiler-rt/lib/builtins/
DCMakeLists.txt231 arm/adddf3vfp.S
232 arm/addsf3vfp.S
233 arm/aeabi_cdcmp.S
234 arm/aeabi_cdcmpeq_check_nan.c
235 arm/aeabi_cfcmp.S
236 arm/aeabi_cfcmpeq_check_nan.c
237 arm/aeabi_dcmp.S
238 arm/aeabi_div0.c
239 arm/aeabi_drsub.c
240 arm/aeabi_fcmp.S
[all …]
/external/libavc/
Dencoder.arm.mk1 libavce_inc_dir_arm += $(LOCAL_PATH)/encoder/arm
2 libavce_inc_dir_arm += $(LOCAL_PATH)/common/arm
6 libavce_srcs_c_arm += encoder/arm/ih264e_function_selector.c
9 libavce_srcs_c_arm += encoder/arm/ih264e_function_selector_a9q.c
11 libavce_srcs_asm_arm += common/arm/ih264_resi_trans_quant_a9.s
12 libavce_srcs_asm_arm += common/arm/ih264_iquant_itrans_recon_a9.s
13 libavce_srcs_asm_arm += common/arm/ih264_iquant_itrans_recon_dc_a9.s
14 libavce_srcs_asm_arm += common/arm/ih264_ihadamard_scaling_a9.s
15 libavce_srcs_asm_arm += common/arm/ih264_deblk_chroma_a9.s
16 libavce_srcs_asm_arm += common/arm/ih264_deblk_luma_a9.s
[all …]
Ddecoder.arm.mk1 libavcd_inc_dir_arm += $(LOCAL_PATH)/decoder/arm
2 libavcd_inc_dir_arm += $(LOCAL_PATH)/common/arm
4 libavcd_srcs_c_arm += decoder/arm/ih264d_function_selector.c
10 libavcd_srcs_c_arm += decoder/arm/ih264d_function_selector_a9q.c
12 libavcd_srcs_asm_arm += common/arm/ih264_intra_pred_chroma_a9q.s
13 libavcd_srcs_asm_arm += common/arm/ih264_intra_pred_luma_16x16_a9q.s
14 libavcd_srcs_asm_arm += common/arm/ih264_intra_pred_luma_4x4_a9q.s
15 libavcd_srcs_asm_arm += common/arm/ih264_intra_pred_luma_8x8_a9q.s
16 libavcd_srcs_asm_arm += common/arm/ih264_inter_pred_chroma_a9q.s
17 libavcd_srcs_asm_arm += common/arm/ih264_inter_pred_filters_luma_horz_a9q.s
[all …]
/external/libvpx/config/arm-neon/
Dlibvpx_srcs.txt7 vp8/common/arm/armv6/bilinearfilter_v6.asm
8 vp8/common/arm/armv6/copymem16x16_v6.asm
9 vp8/common/arm/armv6/copymem8x4_v6.asm
10 vp8/common/arm/armv6/copymem8x8_v6.asm
11 vp8/common/arm/armv6/dc_only_idct_add_v6.asm
12 vp8/common/arm/armv6/dequant_idct_v6.asm
13 vp8/common/arm/armv6/dequantize_v6.asm
14 vp8/common/arm/armv6/filter_v6.asm
15 vp8/common/arm/armv6/idct_blk_v6.c
16 vp8/common/arm/armv6/idct_v6.asm
[all …]
/external/libmpeg2/
Ddecoder.arm.mk1 libmpeg2d_inc_dir_arm += $(LOCAL_PATH)/decoder/arm
2 libmpeg2d_inc_dir_arm += $(LOCAL_PATH)/common/arm
4 libmpeg2d_srcs_c_arm += decoder/arm/impeg2d_function_selector.c
5 libmpeg2d_srcs_c_arm += common/arm/ideint_function_selector.c
8 LOCAL_ARM_MODE := arm
11 libmpeg2d_srcs_c_arm += decoder/arm/impeg2d_function_selector_a9q.c
12 libmpeg2d_srcs_c_arm += common/arm/ideint_function_selector_a9.c
13 libmpeg2d_srcs_asm_arm += common/arm/icv_sad_a9.s
14 libmpeg2d_srcs_asm_arm += common/arm/icv_variance_a9.s
15 libmpeg2d_srcs_asm_arm += common/arm/ideint_spatial_filter_a9.s
[all …]
/external/valgrind/memcheck/tests/vbit-test/
Dirops.c38 …{ DEFOP(Iop_Add8, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 =…
39 …{ DEFOP(Iop_Add16, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 =…
40 …{ DEFOP(Iop_Add32, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 =…
41 …{ DEFOP(Iop_Add64, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 =…
42 …{ DEFOP(Iop_Sub8, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 =…
43 …{ DEFOP(Iop_Sub16, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 =…
44 …{ DEFOP(Iop_Sub32, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 =…
45 …{ DEFOP(Iop_Sub64, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 =…
46 …{ DEFOP(Iop_Mul8, UNDEF_LEFT), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 =…
47 …{ DEFOP(Iop_Mul16, UNDEF_LEFT), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 =…
[all …]
/external/libvpx/libvpx/vpx_dsp/
Dvpx_dsp.mk55 DSP_SRCS-$(HAVE_NEON_ASM) += arm/intrapred_neon_asm$(ASM)
56 DSP_SRCS-$(HAVE_NEON) += arm/intrapred_neon.c
87 DSP_SRCS-yes += arm/vpx_convolve_copy_neon_asm$(ASM)
88 DSP_SRCS-yes += arm/vpx_convolve8_avg_neon_asm$(ASM)
89 DSP_SRCS-yes += arm/vpx_convolve8_neon_asm$(ASM)
90 DSP_SRCS-yes += arm/vpx_convolve_avg_neon_asm$(ASM)
91 DSP_SRCS-yes += arm/vpx_convolve_neon.c
94 DSP_SRCS-yes += arm/vpx_convolve_copy_neon.c
95 DSP_SRCS-yes += arm/vpx_convolve8_avg_neon.c
96 DSP_SRCS-yes += arm/vpx_convolve8_neon.c
[all …]
/external/llvm/test/CodeGen/ARM/
Dintrinsics-crypto.ll6 %tmp3 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %tmp, <16 x i8> %tmp2)
8 %tmp4 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %tmp3, <16 x i8> %tmp2)
10 %tmp5 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %tmp4)
12 %tmp6 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %tmp5)
22 %resscalar = call i32 @llvm.arm.neon.sha1h(i32 %scalar)
25 %res2 = call <4 x i32> @llvm.arm.neon.sha1c(<4 x i32> %tmp2, i32 %scalar, <4 x i32> %res1)
27 %res3 = call <4 x i32> @llvm.arm.neon.sha1m(<4 x i32> %res2, i32 %scalar, <4 x i32> %res1)
29 %res4 = call <4 x i32> @llvm.arm.neon.sha1p(<4 x i32> %res3, i32 %scalar, <4 x i32> %res1)
31 %res5 = call <4 x i32> @llvm.arm.neon.sha1su0(<4 x i32> %res4, <4 x i32> %tmp3, <4 x i32> %res1)
33 %res6 = call <4 x i32> @llvm.arm.neon.sha1su1(<4 x i32> %res5, <4 x i32> %res1)
[all …]
Dintrinsics.ll7 %0 = tail call i32 @llvm.arm.mrc(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
9 tail call void @llvm.arm.mcr(i32 7, i32 1, i32 %0, i32 1, i32 1, i32 4) nounwind
11 %1 = tail call i32 @llvm.arm.mrc2(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
13 tail call void @llvm.arm.mcr2(i32 7, i32 1, i32 %1, i32 1, i32 1, i32 4) nounwind
15 tail call void @llvm.arm.mcrr(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
17 tail call void @llvm.arm.mcrr2(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
19 tail call void @llvm.arm.cdp(i32 7, i32 3, i32 1, i32 1, i32 1, i32 5) nounwind
21 tail call void @llvm.arm.cdp2(i32 7, i32 3, i32 1, i32 1, i32 1, i32 5) nounwind
25 declare void @llvm.arm.cdp2(i32, i32, i32, i32, i32, i32) nounwind
27 declare void @llvm.arm.cdp(i32, i32, i32, i32, i32, i32) nounwind
[all …]
Dneon-v8.1a.ll6 declare <4 x i16> @llvm.arm.neon.vqrdmulh.v4i16(<4 x i16>, <4 x i16>)
7 declare <8 x i16> @llvm.arm.neon.vqrdmulh.v8i16(<8 x i16>, <8 x i16>)
8 declare <2 x i32> @llvm.arm.neon.vqrdmulh.v2i32(<2 x i32>, <2 x i32>)
9 declare <4 x i32> @llvm.arm.neon.vqrdmulh.v4i32(<4 x i32>, <4 x i32>)
11 declare <4 x i16> @llvm.arm.neon.vqadds.v4i16(<4 x i16>, <4 x i16>)
12 declare <8 x i16> @llvm.arm.neon.vqadds.v8i16(<8 x i16>, <8 x i16>)
13 declare <2 x i32> @llvm.arm.neon.vqadds.v2i32(<2 x i32>, <2 x i32>)
14 declare <4 x i32> @llvm.arm.neon.vqadds.v4i32(<4 x i32>, <4 x i32>)
16 declare <4 x i16> @llvm.arm.neon.vqsubs.v4i16(<4 x i16>, <4 x i16>)
17 declare <8 x i16> @llvm.arm.neon.vqsubs.v8i16(<8 x i16>, <8 x i16>)
[all …]
Dvcvt-v8.ll6 %tmp2 = call <4 x i32> @llvm.arm.neon.vcvtas.v4i32.v4f32(<4 x float> %tmp1)
14 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float> %tmp1)
22 %tmp2 = call <4 x i32> @llvm.arm.neon.vcvtns.v4i32.v4f32(<4 x float> %tmp1)
30 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float> %tmp1)
38 %tmp2 = call <4 x i32> @llvm.arm.neon.vcvtps.v4i32.v4f32(<4 x float> %tmp1)
46 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtps.v2i32.v2f32(<2 x float> %tmp1)
54 %tmp2 = call <4 x i32> @llvm.arm.neon.vcvtms.v4i32.v4f32(<4 x float> %tmp1)
62 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtms.v2i32.v2f32(<2 x float> %tmp1)
70 %tmp2 = call <4 x i32> @llvm.arm.neon.vcvtau.v4i32.v4f32(<4 x float> %tmp1)
78 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtau.v2i32.v2f32(<2 x float> %tmp1)
[all …]
Dldstrex.ll12 %ldrexd = tail call %0 @llvm.arm.ldrexd(i8* %p)
29 %strexd = tail call i32 @llvm.arm.strexd(i32 %tmp4, i32 %tmp7, i8* %ptr)
33 declare %0 @llvm.arm.ldrexd(i8*) nounwind readonly
34 declare i32 @llvm.arm.strexd(i32, i32, i8*) nounwind
41 %val = call i32 @llvm.arm.ldrex.p0i8(i8* %addr)
51 %val = call i32 @llvm.arm.ldrex.p0i16(i16* %addr)
59 %val = call i32 @llvm.arm.ldrex.p0i32(i32* %addr)
63 declare i32 @llvm.arm.ldrex.p0i8(i8*) nounwind readonly
64 declare i32 @llvm.arm.ldrex.p0i16(i16*) nounwind readonly
65 declare i32 @llvm.arm.ldrex.p0i32(i32*) nounwind readonly
[all …]
Dvrec.ll1 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
7 %tmp2 = call <2 x i32> @llvm.arm.neon.vrecpe.v2i32(<2 x i32> %tmp1)
15 %tmp2 = call <4 x i32> @llvm.arm.neon.vrecpe.v4i32(<4 x i32> %tmp1)
23 %tmp2 = call <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float> %tmp1)
31 %tmp2 = call <4 x float> @llvm.arm.neon.vrecpe.v4f32(<4 x float> %tmp1)
35 declare <2 x i32> @llvm.arm.neon.vrecpe.v2i32(<2 x i32>) nounwind readnone
36 declare <4 x i32> @llvm.arm.neon.vrecpe.v4i32(<4 x i32>) nounwind readnone
38 declare <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float>) nounwind readnone
39 declare <4 x float> @llvm.arm.neon.vrecpe.v4f32(<4 x float>) nounwind readnone
46 %tmp3 = call <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
[all …]
Dvminmax.ll1 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
8 %tmp3 = call <8 x i8> @llvm.arm.neon.vmins.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
17 %tmp3 = call <4 x i16> @llvm.arm.neon.vmins.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
26 %tmp3 = call <2 x i32> @llvm.arm.neon.vmins.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
35 %tmp3 = call <8 x i8> @llvm.arm.neon.vminu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
44 %tmp3 = call <4 x i16> @llvm.arm.neon.vminu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
53 %tmp3 = call <2 x i32> @llvm.arm.neon.vminu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
62 %tmp3 = call <2 x float> @llvm.arm.neon.vmins.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
71 %tmp3 = call <16 x i8> @llvm.arm.neon.vmins.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
80 %tmp3 = call <8 x i16> @llvm.arm.neon.vmins.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
[all …]
Dvhadd.ll1 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
8 %tmp3 = call <8 x i8> @llvm.arm.neon.vhadds.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
17 %tmp3 = call <4 x i16> @llvm.arm.neon.vhadds.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
26 %tmp3 = call <2 x i32> @llvm.arm.neon.vhadds.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
35 %tmp3 = call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
44 %tmp3 = call <4 x i16> @llvm.arm.neon.vhaddu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
53 %tmp3 = call <2 x i32> @llvm.arm.neon.vhaddu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
62 %tmp3 = call <16 x i8> @llvm.arm.neon.vhadds.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
71 %tmp3 = call <8 x i16> @llvm.arm.neon.vhadds.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
80 %tmp3 = call <4 x i32> @llvm.arm.neon.vhadds.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
[all …]
Dvqshl.ll1 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
8 %tmp3 = call <8 x i8> @llvm.arm.neon.vqshifts.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
17 %tmp3 = call <4 x i16> @llvm.arm.neon.vqshifts.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
26 %tmp3 = call <2 x i32> @llvm.arm.neon.vqshifts.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
35 %tmp3 = call <1 x i64> @llvm.arm.neon.vqshifts.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
44 %tmp3 = call <8 x i8> @llvm.arm.neon.vqshiftu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
53 %tmp3 = call <4 x i16> @llvm.arm.neon.vqshiftu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
62 %tmp3 = call <2 x i32> @llvm.arm.neon.vqshiftu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
71 %tmp3 = call <1 x i64> @llvm.arm.neon.vqshiftu.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
80 %tmp3 = call <16 x i8> @llvm.arm.neon.vqshifts.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
[all …]
Dcrc32.ll7 %val = call i32 @llvm.arm.crc32b(i32 %cur, i32 %bits)
15 %val = call i32 @llvm.arm.crc32h(i32 %cur, i32 %bits)
22 %val = call i32 @llvm.arm.crc32w(i32 %cur, i32 %next)
30 %val = call i32 @llvm.arm.crc32cb(i32 %cur, i32 %bits)
38 %val = call i32 @llvm.arm.crc32ch(i32 %cur, i32 %bits)
45 %val = call i32 @llvm.arm.crc32cw(i32 %cur, i32 %next)
50 declare i32 @llvm.arm.crc32b(i32, i32)
51 declare i32 @llvm.arm.crc32h(i32, i32)
52 declare i32 @llvm.arm.crc32w(i32, i32)
53 declare i32 @llvm.arm.crc32x(i32, i64)
[all …]
/external/compiler-rt/
DAndroid.mk174 lib/builtins/arm/aeabi_dcmp.S \
175 lib/builtins/arm/aeabi_div0.c \
176 lib/builtins/arm/aeabi_fcmp.S \
177 lib/builtins/arm/aeabi_idivmod.S \
178 lib/builtins/arm/aeabi_ldivmod.S \
179 lib/builtins/arm/aeabi_memcmp.S \
180 lib/builtins/arm/aeabi_memcpy.S \
181 lib/builtins/arm/aeabi_memmove.S \
182 lib/builtins/arm/aeabi_memset.S \
183 lib/builtins/arm/aeabi_uidivmod.S \
[all …]
DAndroid.bp222 arm: {
225 "lib/builtins/arm/aeabi_dcmp.S",
226 "lib/builtins/arm/aeabi_div0.c",
227 "lib/builtins/arm/aeabi_fcmp.S",
228 "lib/builtins/arm/aeabi_idivmod.S",
229 "lib/builtins/arm/aeabi_ldivmod.S",
230 "lib/builtins/arm/aeabi_memcmp.S",
231 "lib/builtins/arm/aeabi_memcpy.S",
232 "lib/builtins/arm/aeabi_memmove.S",
233 "lib/builtins/arm/aeabi_memset.S",
[all …]
/external/libvpx/libvpx/vp8/
Dvp8_common.mk130 VP8_COMMON_SRCS-$(ARCH_ARM) += common/arm/filter_arm.c
131 VP8_COMMON_SRCS-$(ARCH_ARM) += common/arm/loopfilter_arm.c
132 VP8_COMMON_SRCS-$(ARCH_ARM) += common/arm/dequantize_arm.c
135 VP8_COMMON_SRCS-$(HAVE_MEDIA) += common/arm/bilinearfilter_arm.c
136 VP8_COMMON_SRCS-$(HAVE_MEDIA) += common/arm/bilinearfilter_arm.h
137 VP8_COMMON_SRCS-$(HAVE_MEDIA) += common/arm/armv6/bilinearfilter_v6$(ASM)
138 VP8_COMMON_SRCS-$(HAVE_MEDIA) += common/arm/armv6/copymem8x4_v6$(ASM)
139 VP8_COMMON_SRCS-$(HAVE_MEDIA) += common/arm/armv6/copymem8x8_v6$(ASM)
140 VP8_COMMON_SRCS-$(HAVE_MEDIA) += common/arm/armv6/copymem16x16_v6$(ASM)
141 VP8_COMMON_SRCS-$(HAVE_MEDIA) += common/arm/armv6/dc_only_idct_add_v6$(ASM)
[all …]
/external/libvpx/config/arm64/
Dlibvpx_srcs.txt7 vp8/common/arm/dequantize_arm.c
8 vp8/common/arm/filter_arm.c
9 vp8/common/arm/loopfilter_arm.c
10 vp8/common/arm/neon/bilinearpredict_neon.c
11 vp8/common/arm/neon/copymem_neon.c
12 vp8/common/arm/neon/dc_only_idct_add_neon.c
13 vp8/common/arm/neon/dequant_idct_neon.c
14 vp8/common/arm/neon/dequantizeb_neon.c
15 vp8/common/arm/neon/idct_blk_neon.c
16 vp8/common/arm/neon/idct_dequant_0_2x_neon.c
[all …]
/external/clang/test/Modules/
Dtarget-features.m2 // REQUIRES: arm-registered-target
27 @import TargetFeatures.arm;
28 // AARCH32-NOT: module 'TargetFeatures.arm' requires
29 // AARCH64-NOT: module 'TargetFeatures.arm' requires
30 // X86_32: module 'TargetFeatures.arm' requires feature 'arm'
31 // X86_64: module 'TargetFeatures.arm' requires feature 'arm'
32 @import TargetFeatures.arm.aarch32;
33 // AARCH32-NOT: module 'TargetFeatures.arm.aarch32' requires
34 // AARCH64: module 'TargetFeatures.arm.aarch32' requires feature 'aarch32'
35 // X86_32: module 'TargetFeatures.arm.aarch32' requires feature
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