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/external/libhevc/
Ddecoder.arm64.mk6 libhevcd_inc_dir_arm64 += $(LOCAL_PATH)/decoder/arm64
7 libhevcd_inc_dir_arm64 += $(LOCAL_PATH)/common/arm64
12 libhevcd_srcs_c_arm64 += decoder/arm64/ihevcd_function_selector_av8.c
17 libhevcd_srcs_asm_arm64 += common/arm64/ihevc_mem_fns.s
18 libhevcd_srcs_asm_arm64 += common/arm64/ihevc_itrans_recon_32x32.s
19 libhevcd_srcs_asm_arm64 += common/arm64/ihevc_weighted_pred_bi_default.s
20 libhevcd_srcs_asm_arm64 += common/arm64/ihevc_weighted_pred_bi.s
21 libhevcd_srcs_asm_arm64 += common/arm64/ihevc_weighted_pred_uni.s
22 libhevcd_srcs_asm_arm64 += common/arm64/ihevc_deblk_luma_horz.s
23 libhevcd_srcs_asm_arm64 += common/arm64/ihevc_deblk_luma_vert.s
[all …]
/external/valgrind/docs/internals/
DMERGE_3_10_1.txt44 //339858 arm64 dmb sy not implemented
56 //339853 arm64 times syscall unknown
63 //339855 arm64 unhandled getsid/setsid syscalls
74 //340036 arm64: Unhandled instruction ld4 (multiple structures, no offset)
78 //335440 arm64: ld1 (single structure) is not implemented
79 //2979 Complete arm64 load/store insns
82 //14653 Add test cases for all known arm64 load/store instructions.
85 //14667 Enable test cases for arm64 load/store insns
96 //339938 disInstr(arm64): unhandled instruction 0x4F8010A4 (fmla)
101 //340509 arm64: unhandled instruction fcvtas
[all …]
Dqemu-aarch64-linux-HOWTO.txt7 This gives a fairly usable, and not entirely slow, arm64-linux
14 https://gmplib.org/~tege/qemu.html, section 14 (for arm64)
21 wget http://d-i.debian.org/daily-images/arm64/daily/netboot/debian-installer/arm64/linux
23 wget http://d-i.debian.org/daily-images/arm64/daily/netboot/debian-installer/arm64/initrd.gz
66 mv /boot/initrd.img-3.16.0-4-arm64 /boot/initrd.img-3.16.0-4-arm64.old
68 /usr/sbin/update-initramfs -c -k 3.16.0-4-arm64
90 -device virtio-net-device,vlan=0 -kernel boot/vmlinuz-3.16.0-4-arm64 \
91 -initrd boot/initrd.img-3.16.0-4-arm64 \
/external/google-breakpad/src/common/mac/
Darch_utilities.cc59 NXArchInfo* arm64 = new NXArchInfo; in ArchInfo_arm64() local
60 *arm64 = *NXGetArchInfoFromCpuType(CPU_TYPE_ARM, in ArchInfo_arm64()
62 arm64->name = "arm64"; in ArchInfo_arm64()
63 arm64->cputype = CPU_TYPE_ARM64; in ArchInfo_arm64()
64 arm64->cpusubtype = CPU_SUBTYPE_ARM64_ALL; in ArchInfo_arm64()
65 arm64->description = "arm 64"; in ArchInfo_arm64()
66 return arm64; in ArchInfo_arm64()
100 static const NXArchInfo* arm64 = ArchInfo_arm64(); in BreakpadGetArchInfoFromCpuType() local
101 return arm64; in BreakpadGetArchInfoFromCpuType()
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-basic-a64-undefined.txt4 # RUN: echo "0x00 0x08 0x20 0xf8" | llvm-mc -triple arm64 -disassemble 2>&1 | FileCheck %s
5 # RUN: echo "0x00 0x88 0x20 0xf8" | llvm-mc -triple arm64 -disassemble 2>&1 | FileCheck %s
9 # RUN: echo "0x00 0x10 0xa0 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
10 # RUN: echo "0x00 0x10 0x60 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
11 # RUN: echo "0x00 0x14 0x20 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
14 # RUN: echo "0x00 0x00 0xc0 0x72" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
17 # RUN: echo "0x00 0x00 0xc0 0xeb" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
18 # RUN: echo "0x00 0x80 0x80 0x6b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
21 # RUN: echo "0x00 0x80 0x00 0x53" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
24 # RUN: echo "0x00 0x40 0x00 0x2e" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
[all …]
/external/mksh/
DMakefrag.inc11 CC= /huge-ssd/aosp-arm64/prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin/*-gcc
13 …arm64/bionic/libc/arch-arm64/include -isystem /huge-ssd/aosp-arm64/bionic/libc/include -isystem /h…
14 …arn-shared-textrel -Wl,--fatal-warnings -Wl,--no-undefined /huge-ssd/aosp-arm64/out/target/product…
15 …arm64/out/target/product/flounder/obj/lib -Wl,-rpath-link=/huge-ssd/aosp-arm64/out/target/product/…
/external/llvm/test/Transforms/SLPVectorizer/AArch64/
Dmismatched-intrinsics.ll3 target triple = "arm64-apple-ios5.0.0"
7 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v4i32
8 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v2i32
10 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
11 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
17 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
18 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
/external/v8/
DAndroid.v8common.mk392 src/arm64/assembler-arm64.cc \
393 src/arm64/builtins-arm64.cc \
394 src/arm64/codegen-arm64.cc \
395 src/arm64/code-stubs-arm64.cc \
396 src/arm64/cpu-arm64.cc \
397 src/arm64/decoder-arm64.cc \
398 src/arm64/deoptimizer-arm64.cc \
399 src/arm64/disasm-arm64.cc \
400 src/arm64/frames-arm64.cc \
401 src/arm64/instructions-arm64.cc \
[all …]
DBUILD.gn44 v8_target_arch = "arm64"
165 if (v8_target_arch == "arm64") {
1459 } else if (v8_target_arch == "arm64") {
1461 "src/arm64/assembler-arm64.cc",
1462 "src/arm64/assembler-arm64.h",
1463 "src/arm64/assembler-arm64-inl.h",
1464 "src/arm64/builtins-arm64.cc",
1465 "src/arm64/codegen-arm64.cc",
1466 "src/arm64/codegen-arm64.h",
1467 "src/arm64/code-stubs-arm64.cc",
[all …]
/external/llvm/test/CodeGen/AArch64/
Dcpus.ll4 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s
5 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a35 2>&1 | FileCheck %s
6 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a53 2>&1 | FileCheck %s
7 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a57 2>&1 | FileCheck %s
8 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a72 2>&1 | FileCheck %s
9 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=…
Dsimple-macho.ll1 ; RUN: llc -mtriple=arm64-macho -o - %s | FileCheck %s
2 ; RUN: llc -mtriple=arm64-macho -filetype=obj -o %t %s
3 ; RUN: llvm-objdump -triple=arm64-macho -d %t | FileCheck --check-prefix=CHECK-OBJ %s
Darm64-elf-calls.ll1 ; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s
2 ; RUN: llc -mtriple=arm64-linux-gnu -filetype=obj -o - %s | llvm-objdump -triple=arm64-linux-gnu - …
Darm64-simplest-elf.ll1 ; RUN: llc -mtriple=arm64-linux-gnu < %s | FileCheck %s
2 ; RUN: llc -mtriple=arm64-linux-gnu -filetype=obj < %s | llvm-objdump - -r -d --triple=arm64-linux-…
Darm64-2013-01-13-ffast-fcmp.ll1 ; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s
2 ; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple -fp-contract=fast | FileCheck %s --check-pr…
5 target triple = "arm64-apple-ios7.0.0"
Darm64-strict-align.ll1 ; RUN: llc < %s -mtriple=arm64-apple-darwin | FileCheck %s
2 ; RUN: llc < %s -mtriple=arm64-apple-darwin -mattr=+strict-align | FileCheck %s --check-prefix=CHEC…
3 ; RUN: llc < %s -mtriple=arm64-apple-darwin -mattr=+strict-align -fast-isel | FileCheck %s --check-…
Darm64-blockaddress.ll1 ; RUN: llc < %s -mtriple=arm64-apple-ios | FileCheck %s
2 ; RUN: llc < %s -mtriple=arm64-linux-gnu | FileCheck %s --check-prefix=CHECK-LINUX
3 ; RUN: llc < %s -mtriple=arm64-linux-gnu -code-model=large| FileCheck %s --check-prefix=CHECK-LARGE
Darm64-platform-reg.ll1 ; RUN: llc -mtriple=arm64-apple-ios -mattr=+reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK…
2 ; RUN: llc -mtriple=arm64-freebsd-gnu -mattr=+reserve-x18 -o - %s | FileCheck %s --check-prefix=CHE…
3 ; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s
Darm64-subsections.ll1 ; RUN: llc -mtriple=arm64-apple-ios7.0 -o - %s | FileCheck %s --check-prefix=CHECK-MACHO
2 ; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s --check-prefix=CHECK-ELF
Darm64-frame-index.ll1 ; RUN: llc -march=arm64 -mtriple=arm64-apple-ios -aarch64-atomic-cfg-tidy=0 < %s | FileCheck %s
Darm64-named-reg-notareg.ll1 ; RUN: not llc < %s -mtriple=arm64-apple-darwin 2>&1 | FileCheck %s
2 ; RUN: not llc < %s -mtriple=arm64-linux-gnueabi 2>&1 | FileCheck %s
Darm64-named-reg-alloc.ll1 ; RUN: not llc < %s -mtriple=arm64-apple-darwin 2>&1 | FileCheck %s
2 ; RUN: not llc < %s -mtriple=arm64-linux-gnueabi 2>&1 | FileCheck %s
/external/v8/tools/gyp/
Dv8.gyp1162 ['v8_target_arch=="arm64"', {
1163 'sources': [ ### gcmole(arch:arm64) ###
1164 '../../src/arm64/assembler-arm64.cc',
1165 '../../src/arm64/assembler-arm64.h',
1166 '../../src/arm64/assembler-arm64-inl.h',
1167 '../../src/arm64/builtins-arm64.cc',
1168 '../../src/arm64/codegen-arm64.cc',
1169 '../../src/arm64/codegen-arm64.h',
1170 '../../src/arm64/code-stubs-arm64.cc',
1171 '../../src/arm64/code-stubs-arm64.h',
[all …]
/external/valgrind/VEX/auxprogs/
Dgenoffsets.c165 GENOFFSET(ARM64,arm64,X0); in foo()
166 GENOFFSET(ARM64,arm64,X1); in foo()
167 GENOFFSET(ARM64,arm64,X2); in foo()
168 GENOFFSET(ARM64,arm64,X3); in foo()
169 GENOFFSET(ARM64,arm64,X4); in foo()
170 GENOFFSET(ARM64,arm64,X5); in foo()
171 GENOFFSET(ARM64,arm64,X6); in foo()
172 GENOFFSET(ARM64,arm64,X7); in foo()
173 GENOFFSET(ARM64,arm64,X8); in foo()
174 GENOFFSET(ARM64,arm64,XSP); in foo()
[all …]
/external/compiler-rt/make/platform/
Dclang_darwin.mk89 UniversalArchs.ios += $(call CheckArches,armv7 arm64,ios,$(IOS_SDK))
109 UniversalArchs.profile_ios += $(call CheckArches,armv7 arm64,profile_ios,$(IOS_SDK))
204 CFLAGS.ios.arm64 := $(CFLAGS) $(IOS6_DEPLOYMENT_ARGS)
214 CFLAGS.cc_kext_ios.arm64 := $(CFLAGS) $(IOS6_DEPLOYMENT_ARGS)
223 CFLAGS.profile_ios.arm64 := $(CFLAGS) $(IOS6_DEPLOYMENT_ARGS)
272 FUNCTIONS.ios.arm64 := mulsc3 muldc3 divsc3 divdc3 udivti3 umodti3 \
470 FUNCTIONS.cc_kext_ios.arm64 := $(CCKEXT_ARM64_FUNCTIONS)
553 FUNCTIONS.cc_kext_ios.arm64 := \
554 $(filter-out $(CCKEXT_MISSING_FUNCTIONS),$(FUNCTIONS.cc_kext_ios.arm64))
/external/valgrind/
DREADME.aarch6419 arm64 xml register description files (allowing shadow registers
76 vki-arm64-linux.h: vki_sigaction_base
89 ./include/vki/vki-arm64-linux.h: uses __uint128_t. Should change
103 vki-arm64-linux.h:
117 dispatch-arm64-linux.S: FIXME: set up FP control state before
125 in vki-arm64-scnums.h
154 Make dispatch-arm64-linux.S save any callee-saved Q regs
162 definition of it in vki-arm64-linux.h. Ditto for 32 bit arm.
165 sigframe-arm64-linux.c: build_sigframe: references to nonexistent

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