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/external/llvm/test/CodeGen/X86/
Davx2-intrinsics-x86.ll1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -march=x86 -mattr=avx2 | FileCheck %s
5 …%res = call <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32> %a0, <8 x i32> %a1) ; <<16 x i16>> [#uses…
8 declare <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32>, <8 x i32>) nounwind readnone
13 …%res = call <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16> %a0, <16 x i16> %a1) ; <<32 x i8>> [#uses…
16 declare <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16>, <16 x i16>) nounwind readnone
21 …%res = call <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16> %a0, <16 x i16> %a1) ; <<32 x i8>> [#uses…
24 declare <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16>, <16 x i16>) nounwind readnone
29 %res = call <32 x i8> @llvm.x86.avx2.padds.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1]
32 declare <32 x i8> @llvm.x86.avx2.padds.b(<32 x i8>, <32 x i8>) nounwind readnone
37 …%res = call <16 x i16> @llvm.x86.avx2.padds.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#use…
[all …]
Davx2-intrinsics-x86-upgrade.ll1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -march=x86 -mattr=avx2 | FileCheck %s
5 …%res = call <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16> %a0, <16 x i16> %a1, i32 7) ; <<16 x i16>…
8 declare <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16>, <16 x i16>, i32) nounwind readnone
13 …%res = call <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32> %a0, <4 x i32> %a1, i32 7) ; <<4 x i32>…
16 declare <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32>, <4 x i32>, i32) nounwind readnone
21 …%res = call <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32> %a0, <8 x i32> %a1, i32 7) ; <<8 x i32>…
24 declare <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32>, <8 x i32>, i32) nounwind readnone
29 …%res = call <16 x i16> @llvm.x86.avx2.mpsadbw(<32 x i8> %a0, <32 x i8> %a1, i32 7) ; <<16 x i16>> …
32 declare <16 x i16> @llvm.x86.avx2.mpsadbw(<32 x i8>, <32 x i8>, i32) nounwind readnone
37 %res = call <4 x i64> @llvm.x86.avx2.psll.dq.bs(<4 x i64> %a0, i32 7) ; <<4 x i64>> [#uses=1]
[all …]
Davx2-pmovxrm-intrinsics.ll1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=x86-64 -mattr=+avx2 | FileCheck %s
7 %2 = call <16 x i16> @llvm.x86.avx2.pmovsxbw(<16 x i8> %1)
15 %2 = call <8 x i32> @llvm.x86.avx2.pmovsxbd(<16 x i8> %1)
23 %2 = call <4 x i64> @llvm.x86.avx2.pmovsxbq(<16 x i8> %1)
31 %2 = call <8 x i32> @llvm.x86.avx2.pmovsxwd(<8 x i16> %1)
39 %2 = call <4 x i64> @llvm.x86.avx2.pmovsxwq(<8 x i16> %1)
47 %2 = call <4 x i64> @llvm.x86.avx2.pmovsxdq(<4 x i32> %1)
55 %2 = call <16 x i16> @llvm.x86.avx2.pmovzxbw(<16 x i8> %1)
63 %2 = call <8 x i32> @llvm.x86.avx2.pmovzxbd(<16 x i8> %1)
71 %2 = call <4 x i64> @llvm.x86.avx2.pmovzxbq(<16 x i8> %1)
[all …]
Dcombine-avx2-intrinsics.ll1 ; RUN: llc < %s -march=x86-64 -mcpu=core-avx2 | FileCheck %s
7 %res = call <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16> %a0, <16 x i16> %a0, i32 7)
16 %res = call <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32> %a0, <4 x i32> %a0, i32 7)
25 %res = call <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32> %a0, <8 x i32> %a0, i32 7)
34 %res = call <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16> %a0, <16 x i16> %a1, i32 0)
43 %res = call <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32> %a0, <4 x i32> %a1, i32 0)
52 %res = call <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32> %a0, <8 x i32> %a1, i32 0)
61 %res = call <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16> %a0, <16 x i16> %a1, i32 -1)
70 %res = call <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32> %a0, <4 x i32> %a1, i32 -1)
79 %res = call <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32> %a0, <8 x i32> %a1, i32 -1)
[all …]
Davx2-gather.ll2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 | FileCheck %s
4 declare <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float>, i8*,
9 %res = call <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float> undef,
21 declare <2 x double> @llvm.x86.avx2.gather.d.pd(<2 x double>, i8*,
26 %res = call <2 x double> @llvm.x86.avx2.gather.d.pd(<2 x double> undef,
36 declare <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float>, i8*,
41 %res = call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef,
49 declare <4 x double> @llvm.x86.avx2.gather.d.pd.256(<4 x double>, i8*,
54 %res = call <4 x double> @llvm.x86.avx2.gather.d.pd.256(<4 x double> undef,
Dstack-folding-int-avx2.ll1 ; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx2 < %s | FileCheck %s
20 declare <4 x double> @llvm.x86.avx2.vbroadcast.sd.pd.256(<2 x double>) nounwind readonly
31 declare <4 x float> @llvm.x86.avx2.vbroadcast.ss.ps(<4 x float>) nounwind readonly
42 declare <8 x float> @llvm.x86.avx2.vbroadcast.ss.ps.256(<4 x float>) nounwind readonly
68 %2 = call <16 x i16> @llvm.x86.avx2.mpsadbw(<32 x i8> %a0, <32 x i8> %a1, i8 7)
71 declare <16 x i16> @llvm.x86.avx2.mpsadbw(<32 x i8>, <32 x i8>, i8) nounwind readnone
77 %2 = call <32 x i8> @llvm.x86.avx2.pabs.b(<32 x i8> %a0)
80 declare <32 x i8> @llvm.x86.avx2.pabs.b(<32 x i8>) nounwind readnone
86 %2 = call <8 x i32> @llvm.x86.avx2.pabs.d(<8 x i32> %a0)
89 declare <8 x i32> @llvm.x86.avx2.pabs.d(<8 x i32>) nounwind readnone
[all …]
Dcommute-blend-avx2.ll1 ; RUN: llc -O3 -mtriple=x86_64-unknown -mcpu=core-avx2 -mattr=avx2 < %s | FileCheck %s
16 %2 = call <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16> %1, <16 x i16> %a, i8 17)
23 declare <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16>, <16 x i16>, i8) nounwind readnone
27 %2 = call <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32> %1, <4 x i32> %a, i8 1)
34 declare <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32>, <4 x i32>, i8) nounwind readnone
38 %2 = call <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32> %1, <8 x i32> %a, i8 129)
45 declare <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32>, <8 x i32>, i8) nounwind readnone
Dx86-upgrade-avx2-vbroadcast.ll1 ; RUN: llc -mattr=+avx2 < %s | FileCheck %s
14 %3 = call <4 x i64> @llvm.x86.avx2.vbroadcasti128(i8* %2)
18 declare <4 x i64> @llvm.x86.avx2.vbroadcasti128(i8*) #1
Dllc-override-mcpu-mattr.ll2 ; RUN: llc < %s -march x86-64 -mattr=+avx2 | FileCheck %s
15 %2 = tail call <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8> %0, <32 x i8> %1)
19 declare <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8>, <32 x i8>)
Dsqrt.ll3 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx | FileCh…
4 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -fast-isel -fast-isel-abort=1 | File…
Davx2-vperm.ll1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s
/external/clang/include/clang/Basic/
DBuiltinsX86.def517 TARGET_BUILTIN(__builtin_ia32_mpsadbw256, "V32cV32cV32cIc", "", "avx2")
518 TARGET_BUILTIN(__builtin_ia32_pabsb256, "V32cV32c", "", "avx2")
519 TARGET_BUILTIN(__builtin_ia32_pabsw256, "V16sV16s", "", "avx2")
520 TARGET_BUILTIN(__builtin_ia32_pabsd256, "V8iV8i", "", "avx2")
521 TARGET_BUILTIN(__builtin_ia32_packsswb256, "V32cV16sV16s", "", "avx2")
522 TARGET_BUILTIN(__builtin_ia32_packssdw256, "V16sV8iV8i", "", "avx2")
523 TARGET_BUILTIN(__builtin_ia32_packuswb256, "V32cV16sV16s", "", "avx2")
524 TARGET_BUILTIN(__builtin_ia32_packusdw256, "V16sV8iV8i", "", "avx2")
525 TARGET_BUILTIN(__builtin_ia32_paddsb256, "V32cV32cV32c", "", "avx2")
526 TARGET_BUILTIN(__builtin_ia32_paddsw256, "V16sV16sV16s", "", "avx2")
[all …]
/external/llvm/test/Analysis/BasicAA/
Dpr18573.ll3 ; Check that llvm.x86.avx2.gather.d.ps.256 intrinsic is not eliminated as gather and store memory a…
8 declare <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float>, i8*, <8 x i32>, <8 x float>, i8) #0
16 …%v1 = tail call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef, i8* %arr.ptr, <8 x i…
19 …%v2 = tail call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef, i8* %arr.ptr, <8 x i…
25 ; CHECK: llvm.x86.avx2.gather.d.ps.256
27 ; CHECK: llvm.x86.avx2.gather.d.ps.256
37 …%v1 = tail call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef, i8* %arr.ptr, <8 x i…
40 …%v2 = tail call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef, i8* %arr.ptr, <8 x i…
46 ; CHECK: llvm.x86.avx2.gather.d.ps.256
48 ; CHECK-NOT: llvm.x86.avx2.gather.d.ps.256
[all …]
/external/llvm/test/Transforms/InstCombine/
Dx86-vector-shifts.ll57 %1 = tail call <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16> %v, i32 0)
65 %1 = tail call <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16> %v, i32 15)
73 %1 = tail call <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16> %v, i32 64)
80 %1 = tail call <8 x i32> @llvm.x86.avx2.psrai.d(<8 x i32> %v, i32 0)
88 %1 = tail call <8 x i32> @llvm.x86.avx2.psrai.d(<8 x i32> %v, i32 15)
96 %1 = tail call <8 x i32> @llvm.x86.avx2.psrai.d(<8 x i32> %v, i32 64)
173 %1 = tail call <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16> %v, i32 0)
181 %1 = tail call <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16> %v, i32 15)
188 %1 = tail call <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16> %v, i32 64)
195 %1 = tail call <8 x i32> @llvm.x86.avx2.psrli.d(<8 x i32> %v, i32 0)
[all …]
Dx86-pmovsx.ll10 declare <8 x i32> @llvm.x86.avx2.pmovsxbd(<16 x i8>) nounwind readnone
11 declare <4 x i64> @llvm.x86.avx2.pmovsxbq(<16 x i8>) nounwind readnone
12 declare <16 x i16> @llvm.x86.avx2.pmovsxbw(<16 x i8>) nounwind readnone
13 declare <4 x i64> @llvm.x86.avx2.pmovsxdq(<4 x i32>) nounwind readnone
14 declare <8 x i32> @llvm.x86.avx2.pmovsxwd(<8 x i16>) nounwind readnone
15 declare <4 x i64> @llvm.x86.avx2.pmovsxwq(<8 x i16>) nounwind readnone
87 %res = call <8 x i32> @llvm.x86.avx2.pmovsxbd(<16 x i8> %v)
97 %res = call <4 x i64> @llvm.x86.avx2.pmovsxbq(<16 x i8> %v)
106 %res = call <16 x i16> @llvm.x86.avx2.pmovsxbw(<16 x i8> %v)
115 %res = call <4 x i64> @llvm.x86.avx2.pmovsxdq(<4 x i32> %v)
[all …]
Dx86-pmovzx.ll10 declare <8 x i32> @llvm.x86.avx2.pmovzxbd(<16 x i8>) nounwind readnone
11 declare <4 x i64> @llvm.x86.avx2.pmovzxbq(<16 x i8>) nounwind readnone
12 declare <16 x i16> @llvm.x86.avx2.pmovzxbw(<16 x i8>) nounwind readnone
13 declare <4 x i64> @llvm.x86.avx2.pmovzxdq(<4 x i32>) nounwind readnone
14 declare <8 x i32> @llvm.x86.avx2.pmovzxwd(<8 x i16>) nounwind readnone
15 declare <4 x i64> @llvm.x86.avx2.pmovzxwq(<8 x i16>) nounwind readnone
87 %res = call <8 x i32> @llvm.x86.avx2.pmovzxbd(<16 x i8> %v)
97 %res = call <4 x i64> @llvm.x86.avx2.pmovzxbq(<16 x i8> %v)
106 %res = call <16 x i16> @llvm.x86.avx2.pmovzxbw(<16 x i8> %v)
115 %res = call <4 x i64> @llvm.x86.avx2.pmovzxdq(<4 x i32> %v)
[all …]
Dx86-pshufb.ll17 …%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 0, i8 1, i8 2, i8 …
36 …%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 -128, i8 -128, i8 …
60 %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> zeroinitializer)
119 …%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 -128, i8 1, i8 -12…
127 …%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 -128, i8 -128, i8 …
135 …%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 -128, i8 -128, i8 …
143 …%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 -128, i8 -128, i8 …
151 …%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 0, i8 1, i8 2, i8 …
159 …%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 0, i8 1, i8 -128, …
176 …%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 0, i8 1, i8 2, i8 …
[all …]
/external/llvm/test/Instrumentation/MemorySanitizer/
Dvector_shift.ll9 declare <8 x i32> @llvm.x86.avx2.psllv.d.256(<8 x i32>, <8 x i32>)
10 declare <4 x i32> @llvm.x86.avx2.psllv.d(<4 x i32>, <4 x i32>)
76 %0 = tail call <4 x i32> @llvm.x86.avx2.psllv.d(<4 x i32> %x, <4 x i32> %y)
83 ; CHECK: = call <4 x i32> @llvm.x86.avx2.psllv.d(
85 ; CHECK: = tail call <4 x i32> @llvm.x86.avx2.psllv.d(
90 %0 = tail call <8 x i32> @llvm.x86.avx2.psllv.d.256(<8 x i32> %x, <8 x i32> %y)
97 ; CHECK: = call <8 x i32> @llvm.x86.avx2.psllv.d.256(
99 ; CHECK: = tail call <8 x i32> @llvm.x86.avx2.psllv.d.256(
Dvector_pack.ll7 declare <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16> %a, <16 x i16> %b) nounwind readnone
28 %c = tail call <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16> %a, <16 x i16> %b) nounwind
37 ; CHECK-DAG: call <32 x i8> @llvm.x86.avx2.packsswb(
38 ; CHECK-DAG: call <32 x i8> @llvm.x86.avx2.packuswb(
/external/valgrind/none/tests/amd64/
Davx2-1.vgtest1 prog: avx2-1
2 prereq: test -x avx2-1 && ../../../tests/x86_amd64_features amd64-avx
DMakefile.am27 avx2-1.vgtest avx2-1.stdout.exp avx2-1.stderr.exp \
115 check_PROGRAMS += avx2-1
/external/boringssl/src/crypto/bn/
DCMakeLists.txt10 rsaz-avx2.${ASM_EXT}
72 perlasm(rsaz-avx2.${ASM_EXT} asm/rsaz-avx2.pl)
/external/llvm/test/Other/
Dopt-override-mcpu-mattr.ll1 ; RUN: opt < %s -mtriple=x86_64-apple-darwin -mcpu=broadwell -mattr=+avx2 -S | FileCheck %s
6 …ounwind readnone ssp uwtable "target-cpu"="broadwell" "target-features"="+avx2" "use-soft-float"="…
/external/flac/libFLAC/
Dcpu.c60 info->ia32.avx2 = false; in disable_avx()
69 info->x86.avx2 = false; in disable_avx()
188 info->ia32.avx2 = (flags_ebx & FLAC__CPUINFO_IA32_CPUID_AVX2 )? true : false; in FLAC__cpu_info()
205 fprintf(stderr, " AVX2 ....... %c\n", info->ia32.avx2 ? 'Y' : 'n'); in FLAC__cpu_info()
366 info->x86.avx2 = (flags_ebx & FLAC__CPUINFO_IA32_CPUID_AVX2 )? true : false; in FLAC__cpu_info()
378 fprintf(stderr, " AVX2 ....... %c\n", info->x86.avx2 ? 'Y' : 'n'); in FLAC__cpu_info()
/external/flac/libFLAC/include/private/
Dcpu.h131 FLAC__bool avx2; member
143 FLAC__bool avx2; member

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