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Searched refs:bitsLE (Results 1 – 10 of 10) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DValueTypes.h213 bool bitsLE(EVT VT) const { in bitsLE() function
DMachineValueType.h540 bool bitsLE(MVT VT) const { in bitsLE() function
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeFloatTypes.cpp1369 assert(LD->getMemoryVT().bitsLE(NVT) && "Float type not round?"); in ExpandFloatRes_LOAD()
1399 if (SrcVT.bitsLE(MVT::i32)) { in ExpandFloatRes_XINT_TO_FP()
1408 if (SrcVT.bitsLE(MVT::i64)) { in ExpandFloatRes_XINT_TO_FP()
1412 } else if (SrcVT.bitsLE(MVT::i128)) { in ExpandFloatRes_XINT_TO_FP()
1690 assert(ST->getMemoryVT().bitsLE(NVT) && "Float type not round?"); in ExpandFloatOp_STORE()
DLegalizeIntegerTypes.cpp449 assert(Res.getValueType().bitsLE(NVT) && "Extension doesn't make sense!"); in PromoteIntRes_INT_EXTEND()
618 assert(NVT.bitsLE(SVT) && "Integer type overpromoted?"); in PromoteIntRes_SETCC()
1820 if (Op.getValueType().bitsLE(NVT)) { in ExpandIntRes_ANY_EXTEND()
2014 if (N->getMemoryVT().bitsLE(NVT)) { in ExpandIntRes_LOAD()
2336 if (Op.getValueType().bitsLE(NVT)) { in ExpandIntRes_SIGN_EXTEND()
2369 if (EVT.bitsLE(Lo.getValueType())) { in ExpandIntRes_SIGN_EXTEND_INREG()
2594 if (Op.getValueType().bitsLE(NVT)) { in ExpandIntRes_ZERO_EXTEND()
2964 if (N->getMemoryVT().bitsLE(NVT)) { in ExpandIntOp_STORE()
DSelectionDAG.cpp727 EltVT.bitsLE(I->getValueType()))) && in VerifySDNode()
1031 if (VT.bitsLE(Op.getValueType())) in getBoolExtOrTrunc()
3138 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && in getNode()
3566 assert(EVT.bitsLE(VT) && "Not rounding down!"); in getNode()
3574 VT.bitsLE(N1.getValueType()) && in getNode()
3587 assert(EVT.bitsLE(VT) && "Not extending!"); in getNode()
3602 assert(EVT.bitsLE(VT) && "Not extending!"); in getNode()
DTargetLowering.cpp1538 isTypeLegal(VT) && VT.bitsLE(N0.getValueType())) { in SimplifySetCC()
1710 (isTypeLegal(VT) && VT.bitsLE(N0.getValueType()))) && in SimplifySetCC()
DDAGCombiner.cpp12908 MinVT = (!FoundMinVT || OpSVT.bitsLE(MinVT)) ? OpSVT : MinVT; in visitCONCAT_VECTORS()
/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp524 if (VT.getVectorNumElements() != 1 && VT.getScalarType().bitsLE(MVT::i16)) in getPreferredVectorAction()
DR600ISelLowering.cpp1329 assert(VT.bitsLE(MVT::i32)); in LowerSTORE()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp18526 assert(EltVT.bitsLE(MVT::i64) && "Unexpected element type!"); in LowerScalarVariableShift()