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/external/jacoco/org.jacoco.core.test/src/org/jacoco/core/analysis/
DCounterComparatorTest.java31 final Comparator<ICounter> cmp = CounterComparator.TOTALITEMS; in testTotalItemsComparator() local
32 assertCmpLess(cmp, 19, 5, 19, 6); in testTotalItemsComparator()
33 assertCmpEquals(cmp, 20, 5, 19, 6); in testTotalItemsComparator()
34 assertCmpGreater(cmp, 21, 5, 19, 6); in testTotalItemsComparator()
39 final Comparator<ICounter> cmp = CounterComparator.COVEREDITEMS; in testCoveredItemsComparator() local
40 assertCmpLess(cmp, 73, 7, 42, 8); in testCoveredItemsComparator()
41 assertCmpEquals(cmp, 42, 8, 82, 8); in testCoveredItemsComparator()
42 assertCmpGreater(cmp, 21, 9, 32, 8); in testCoveredItemsComparator()
47 final Comparator<ICounter> cmp = CounterComparator.MISSEDITEMS; in testMissedItemsComparator() local
48 assertCmpLess(cmp, 10, 40, 11, 80); in testMissedItemsComparator()
[all …]
/external/llvm/test/Transforms/InstSimplify/
Dshr-nop.ll18 %cmp = icmp eq i8 %shr, 0
19 ret i1 %cmp
26 %cmp = icmp eq i8 %shr, 0
27 ret i1 %cmp
34 %cmp = icmp eq i8 %shr, 0
35 ret i1 %cmp
42 %cmp = icmp ne i8 %shr, 0
43 ret i1 %cmp
50 %cmp = icmp ne i8 %shr, 0
51 ret i1 %cmp
[all …]
Dselect.ll5 %cmp = icmp eq i32 %and, 0
7 %and1.x = select i1 %cmp, i32 %and1, i32 %x
15 %cmp = icmp ne i32 %and, 0
17 %and1.x = select i1 %cmp, i32 %x, i32 %and1
25 %cmp = icmp ne i32 %and, 0
27 %and1.x = select i1 %cmp, i32 %and1, i32 %x
35 %cmp = icmp slt i32 %X, 0
37 %cond = select i1 %cmp, i32 %X, i32 %or
45 %cmp = icmp slt i32 %X, 0
47 %cond = select i1 %cmp, i32 %or, i32 %X
[all …]
/external/llvm/test/CodeGen/AArch64/
Darm64-fast-isel-icmp.ll6 ; CHECK: cmp w0, #31
8 %cmp = icmp eq i32 %a, 31
9 %conv = zext i1 %cmp to i32
18 %cmp = icmp eq i32 %a, -7
19 %conv = zext i1 %cmp to i32
26 ; CHECK: cmp w0, w1
28 %cmp = icmp eq i32 %a, %b
29 %conv = zext i1 %cmp to i32
36 ; CHECK: cmp w0, w1
38 %cmp = icmp ne i32 %a, %b
[all …]
/external/llvm/test/Transforms/InstCombine/
Dicmp-shr.ll9 %cmp = icmp eq i8 %shr, 0
10 ret i1 %cmp
17 %cmp = icmp eq i8 %shr, 0
18 ret i1 %cmp
25 %cmp = icmp ne i8 %shr, 0
26 ret i1 %cmp
33 %cmp = icmp ne i8 %shr, 0
34 ret i1 %cmp
41 %cmp = icmp eq i8 %shr, 128
42 ret i1 %cmp
[all …]
Dcast-int-fcmp-eq-0.ll8 %cmp = fcmp oeq float %f, 0.0
9 ret i1 %cmp
17 %cmp = fcmp oeq float %f, -0.0
18 ret i1 %cmp
26 %cmp = fcmp oeq float %f, 0.0
27 ret i1 %cmp
35 %cmp = fcmp oeq float %f, -0.0
36 ret i1 %cmp
44 %cmp = fcmp one float %f, 0.0
45 ret i1 %cmp
[all …]
Dunordered-fcmp-select.ll4 ; CHECK: %cmp.inv = fcmp ole float %a, %b
5 ; CHECK-NEXT: %sel = select i1 %cmp.inv, float %b, float %a
8 %cmp = fcmp ugt float %a, %b
9 %sel = select i1 %cmp, float %a, float %b
14 ; CHECK: %cmp.inv = fcmp olt float %a, %b
15 ; CHECK-NEXT: %sel = select i1 %cmp.inv, float %b, float %a
18 %cmp = fcmp uge float %a, %b
19 %sel = select i1 %cmp, float %a, float %b
24 ; CHECK: %cmp.inv = fcmp ole float %a, %b
25 ; CHECK-NEXT: %sel = select i1 %cmp.inv, float %a, float %b
[all …]
Dfcmp.ll8 %cmp = fcmp ogt double %ext1, %ext2
9 ret i1 %cmp
16 %cmp = fcmp ogt double %ext, 1.000000e+00
17 ret i1 %cmp
24 %cmp = fcmp ogt double %ext, 0x3FF0000000000001 ; more precision than float.
25 ret i1 %cmp
32 %cmp = fcmp ogt double %ext, 0x36A0000000000000 ; denormal in float.
33 ret i1 %cmp
40 %cmp = fcmp ogt float %neg, 1.000000e+00
41 ret i1 %cmp
[all …]
/external/llvm/test/CodeGen/NVPTX/
Dcombine-min-max.ll10 %cmp = icmp eq i32 %a, %b
11 %sel = select i1 %cmp, i32 %a, i32 %b
19 %cmp = icmp ne i64 %a, %b
20 %sel = select i1 %cmp, i64 %b, i64 %a
33 %cmp = icmp ugt i16 %a, %b
34 %sel = select i1 %cmp, i16 %a, i16 %b
46 %cmp = icmp ugt i32 %a, %b
47 %sel = select i1 %cmp, i32 %a, i32 %b
54 %cmp = icmp uge i32 %a, %b
55 %sel = select i1 %cmp, i32 %a, i32 %b
[all …]
Dcompare-int.ll15 %cmp = icmp eq i64 %a, %b
16 %ret = zext i1 %cmp to i64
24 %cmp = icmp ne i64 %a, %b
25 %ret = zext i1 %cmp to i64
33 %cmp = icmp ugt i64 %a, %b
34 %ret = zext i1 %cmp to i64
42 %cmp = icmp uge i64 %a, %b
43 %ret = zext i1 %cmp to i64
51 %cmp = icmp ult i64 %a, %b
52 %ret = zext i1 %cmp to i64
[all …]
/external/llvm/test/CodeGen/Hexagon/
Dcmp-promote.ll6 ; CHECK: cmp.eq{{.*}}#-16
9 %not.cmp = icmp ne i16 %q, -16
10 %res.0 = zext i1 %not.cmp to i32
14 ; CHECK: cmp.eq{{.*}}#-14
17 %cmp = icmp eq i16 %q, -14
18 %res.0 = select i1 %cmp, i32 2, i32 0
22 ; CHECK: cmp.eq{{.*}}#-8
25 %cmp = icmp eq i8 %r, -8
26 %res.0 = select i1 %cmp, i32 0, i32 3
30 ; CHECK: cmp.eq{{.*}}#-6
[all …]
Dcmp_pred_reg.ll8 %cmp = icmp ugt i32 %Enum_Par_Val, %pv2
9 %selv = zext i1 %cmp to i32
16 %cmp = icmp uge i32 %Enum_Par_Val, %pv2
17 %selv = zext i1 %cmp to i32
24 %cmp = icmp ult i32 %Enum_Par_Val, %pv2
25 %selv = zext i1 %cmp to i32
32 %cmp = icmp ule i32 %Enum_Par_Val, %pv2
33 %selv = zext i1 %cmp to i32
40 %cmp = icmp eq i32 %Enum_Par_Val, %pv2
41 %selv = zext i1 %cmp to i32
[all …]
Dcmp_pred.ll8 %cmp = icmp ugt i32 %Enum_Par_Val, %pv2
9 %selv = zext i1 %cmp to i32
16 %cmp = icmp uge i32 %Enum_Par_Val, %pv2
17 %selv = zext i1 %cmp to i32
24 %cmp = icmp ult i32 %Enum_Par_Val, %pv2
25 %selv = zext i1 %cmp to i32
32 %cmp = icmp ule i32 %Enum_Par_Val, %pv2
33 %selv = zext i1 %cmp to i32
40 %cmp = icmp eq i32 %Enum_Par_Val, %pv2
41 %selv = zext i1 %cmp to i32
[all …]
/external/iproute2/tc/
Dem_cmp.c47 struct tcf_em_cmp cmp; in cmp_parse_eopt() local
49 memset(&cmp, 0, sizeof(cmp)); in cmp_parse_eopt()
103 cmp.flags |= TCF_EM_CMP_TRANS; in cmp_parse_eopt()
130 cmp.val = (__u32) value; in cmp_parse_eopt()
131 cmp.mask = (__u32) mask; in cmp_parse_eopt()
132 cmp.off = (__u16) offset; in cmp_parse_eopt()
133 cmp.align = (__u8) align; in cmp_parse_eopt()
134 cmp.layer = (__u8) layer; in cmp_parse_eopt()
135 cmp.opnd = (__u8) opnd; in cmp_parse_eopt()
138 addraw_l(n, MAX_MSG, &cmp, sizeof(cmp)); in cmp_parse_eopt()
[all …]
/external/libnl/lib/route/cls/ematch/
Dcmp.c36 static const char *align_txt(struct tcf_em_cmp *cmp) in align_txt() argument
38 switch (cmp->align) { in align_txt()
42 return (cmp->flags & TCF_EM_CMP_TRANS) ? "h16" : "u16"; in align_txt()
44 return (cmp->flags & TCF_EM_CMP_TRANS) ? "h32" : "u32"; in align_txt()
46 return (cmp->flags & TCF_EM_CMP_TRANS) ? "h?" : "u?"; in align_txt()
50 static const char *layer_txt(struct tcf_em_cmp *cmp) in layer_txt() argument
52 switch (cmp->layer) { in layer_txt()
64 static const char *relation_txt(struct tcf_em_cmp *cmp) in relation_txt() argument
66 switch (cmp->opnd) { in relation_txt()
87 struct tcf_em_cmp *cmp = rtnl_ematch_data(m); in cmp_dump() local
[all …]
/external/llvm/test/CodeGen/PowerPC/
Dvec_cmp.ll13 %cmp = icmp eq <2 x i8> %x, %y
14 %sext = sext <2 x i1> %cmp to <2 x i8>
22 %cmp = icmp eq <4 x i8> %x, %y
23 %sext = sext <4 x i1> %cmp to <4 x i8>
31 %cmp = icmp eq <8 x i8> %x, %y
32 %sext = sext <8 x i1> %cmp to <8 x i8>
42 %cmp = icmp eq <16 x i8> %x, %y
43 %sext = sext <16 x i1> %cmp to <16 x i8>
51 %cmp = icmp ne <16 x i8> %x, %y
52 %sext = sext <16 x i1> %cmp to <16 x i8>
[all …]
/external/llvm/test/MC/Disassembler/Hexagon/
Dj.txt14 # CHECK: p0 = cmp.eq(r17,#-1); if (p0.new) jump:nt
16 # CHECK: p0 = cmp.gt(r17,#-1); if (p0.new) jump:nt
20 # CHECK: p0 = cmp.eq(r17,#-1); if (p0.new) jump:t
22 # CHECK: p0 = cmp.gt(r17,#-1); if (p0.new) jump:t
26 # CHECK: p0 = cmp.eq(r17,#-1); if (!p0.new) jump:nt
28 # CHECK: p0 = cmp.gt(r17,#-1); if (!p0.new) jump:nt
32 # CHECK: p0 = cmp.eq(r17,#-1); if (!p0.new) jump:t
34 # CHECK: p0 = cmp.gt(r17,#-1); if (!p0.new) jump:t
38 # CHECK: p0 = cmp.eq(r17, #21); if (p0.new) jump:nt
40 # CHECK: p0 = cmp.eq(r17, #21); if (p0.new) jump:t
[all …]
/external/llvm/test/CodeGen/X86/
Dfpcmp-soft-fp.ll5 %cmp = fcmp ule double %d, 0.000000e+00
6 ret i1 %cmp
15 %cmp = fcmp ult double %d, 0.000000e+00
16 ret i1 %cmp
25 %cmp = fcmp ugt double %d, 0.000000e+00
26 ret i1 %cmp
35 %cmp = fcmp uge double %d, 0.000000e+00
36 ret i1 %cmp
45 %cmp = fcmp ole double %d, 0.000000e+00
46 ret i1 %cmp
[all …]
Dfp-select-cmp-and.ll4 %cmp = fcmp olt double %a, %eps
5 %cond = select i1 %cmp, double %b, double 0.000000e+00
14 %cmp = fcmp ole double %a, %eps
15 %cond = select i1 %cmp, double %b, double 0.000000e+00
24 %cmp = fcmp ogt double %a, %eps
25 %cond = select i1 %cmp, double %b, double 0.000000e+00
34 %cmp = fcmp oge double %a, %eps
35 %cond = select i1 %cmp, double %b, double 0.000000e+00
44 %cmp = fcmp olt double %a, %eps
45 %cond = select i1 %cmp, double 0.000000e+00, double %b
[all …]
Djump_sign.ll32 %cmp = icmp sgt i32 %sub, 0
33 %cond = select i1 %cmp, i32 %sub, i32 0
41 ; CHECK-NOT: cmp
45 %cmp = icmp slt i32 %b, %a
47 %cond = select i1 %cmp, i32 %sub, i32 0
53 ; CHECK-NOT: cmp
57 %cmp = icmp sgt i32 %a, %b
59 %cond = select i1 %cmp, i32 %sub, i32 0
65 ; CHECK-NOT: cmp
69 %cmp = icmp ugt i32 %a, %b
[all …]
/external/llvm/test/CodeGen/ARM/
Dfast-isel-cmp-imm.ll9 %cmp = fcmp oeq float %a, 0.000000e+00
12 br i1 %cmp, label %if.then, label %if.end
29 %cmp = fcmp oeq float %a, -0.000000e+00
34 br i1 %cmp, label %if.then, label %if.end
48 %cmp = fcmp oeq double %a, 0.000000e+00
51 br i1 %cmp, label %if.then, label %if.end
66 %cmp = fcmp oeq double %a, -0.000000e+00
71 br i1 %cmp, label %if.then, label %if.end
85 %cmp = icmp eq i8 %a, -1
88 br i1 %cmp, label %if.then, label %if.end
[all …]
Dsub-cmp-peephole.ll10 ; CHECK-NOT: cmp
11 %cmp = icmp sgt i32 %a, %b
13 %sub. = select i1 %cmp, i32 %sub, i32 0
21 ; CHECK-NOT: cmp
22 %cmp = icmp slt i32 %a, %b
24 %sub. = select i1 %cmp, i32 %sub, i32 0
32 ; CHECK-NOT: cmp
33 %cmp = icmp sgt i32 %a, 3
35 %sub. = select i1 %cmp, i32 %sub, i32 %b
44 ; CHECK-NOT: cmp
[all …]
Dfast-isel-icmp.ll10 ; ARM: cmp r0, r1
14 ; THUMB: cmp r0, r1
15 %cmp = icmp slt i16 %a, %b
16 %conv2 = zext i1 %cmp to i32
25 ; ARM: cmp r0, r1
29 ; THUMB: cmp r0, r1
30 %cmp = icmp ult i16 %a, %b
31 %conv2 = zext i1 %cmp to i32
40 ; ARM: cmp r0, r1
44 ; THUMB: cmp r0, r1
[all …]
/external/llvm/test/MC/Mips/micromips64r6/
Dvalid.s58 cmp.af.s $f2, $f3, $f4 # CHECK: cmp.af.s $f2, $f3, $f4 # encoding: [0x54,0x83,0x10,0x05]
59 cmp.af.d $f2, $f3, $f4 # CHECK: cmp.af.d $f2, $f3, $f4 # encoding: [0x54,0x83,0x10,0x15]
60 cmp.un.s $f2, $f3, $f4 # CHECK: cmp.un.s $f2, $f3, $f4 # encoding: [0x54,0x83,0x10,0x45]
61 cmp.un.d $f2, $f3, $f4 # CHECK: cmp.un.d $f2, $f3, $f4 # encoding: [0x54,0x83,0x10,0x55]
62 cmp.eq.s $f2, $f3, $f4 # CHECK: cmp.eq.s $f2, $f3, $f4 # encoding: [0x54,0x83,0x10,0x85]
63 cmp.eq.d $f2, $f3, $f4 # CHECK: cmp.eq.d $f2, $f3, $f4 # encoding: [0x54,0x83,0x10,0x95]
64 cmp.ueq.s $f2, $f3, $f4 # CHECK: cmp.ueq.s $f2, $f3, $f4 # encoding: [0x54,0x83,0x10,0xc5]
65 cmp.ueq.d $f2, $f3, $f4 # CHECK: cmp.ueq.d $f2, $f3, $f4 # encoding: [0x54,0x83,0x10,0xd5]
66 cmp.lt.s $f2, $f3, $f4 # CHECK: cmp.lt.s $f2, $f3, $f4 # encoding: [0x54,0x83,0x11,0x05]
67 cmp.lt.d $f2, $f3, $f4 # CHECK: cmp.lt.d $f2, $f3, $f4 # encoding: [0x54,0x83,0x11,0x15]
[all …]
/external/libvpx/libvpx/vp8/encoder/mips/msa/
Ddenoising_msa.c43 v8i16 temp0_h, temp1_h, temp2_h, temp3_h, cmp, delta_vec; in vp8_denoiser_filter_msa() local
86 cmp = __msa_clei_s_h(abs_diff0, 15); in vp8_denoiser_filter_msa()
87 cmp = cmp & one; in vp8_denoiser_filter_msa()
88 mask0 += cmp; in vp8_denoiser_filter_msa()
89 cmp = __msa_clei_s_h(abs_diff0, 7); in vp8_denoiser_filter_msa()
90 cmp = cmp & one; in vp8_denoiser_filter_msa()
91 mask0 += cmp; in vp8_denoiser_filter_msa()
92 cmp = abs_diff0 < shift_inc1_vec; in vp8_denoiser_filter_msa()
93 cmp = cmp & one; in vp8_denoiser_filter_msa()
94 mask0 += cmp; in vp8_denoiser_filter_msa()
[all …]

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