Searched refs:hasCtrlDep (Results 1 – 21 of 21) sorted by relevance
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrControl.td | 17 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
30 } // isBranch = 1, isTerminator = 1, hasCtrlDep = 1
44 let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
51 } // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1
59 let isTerminator = 1, hasCtrlDep = 1 in
67 let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
76 } // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1
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| /external/llvm/utils/TableGen/ |
| D | CodeGenInstruction.h | 247 bool hasCtrlDep : 1; variable
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| D | CodeGenInstruction.cpp | 318 hasCtrlDep = R->getValueAsBit("hasCtrlDep"); in CodeGenInstruction()
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| D | DAGISelMatcherGen.cpp | 736 && (II.hasCtrlDep || II.mayLoad || II.mayStore || II.canFoldAsLoad || in EmitResultInstructionAsOperand()
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| /external/llvm/include/llvm/Target/ |
| D | Target.td | 382 bit hasCtrlDep = 0; // Does this instruction r/w ctrl-flow chains?
774 let hasCtrlDep = 1;
781 let hasCtrlDep = 1;
788 let hasCtrlDep = 1;
907 let hasCtrlDep = 1;
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcInstr64Bit.td | 513 let usesCustomInserter = 1, hasCtrlDep = 1, mayLoad = 1, mayStore = 1,
539 let usesCustomInserter = 1, hasCtrlDep = 1, mayLoad = 1, mayStore = 1,
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrControl.td | 23 hasCtrlDep = 1, FPForm = SpecialFP, SchedRW = [WriteJumpLd] in {
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| D | X86InstrCompiler.td | 140 hasCtrlDep = 1, isCodeGenOnly = 1 in {
148 hasCtrlDep = 1, isCodeGenOnly = 1 in {
155 let isTerminator = 1, hasSideEffects = 1, isBarrier = 1, hasCtrlDep = 1,
166 let hasSideEffects = 1, hasCtrlDep = 1, isCodeGenOnly = 1,
175 let hasSideEffects = 1, hasCtrlDep = 1, isCodeGenOnly = 1 in
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| D | X86InstrSystem.td | 26 let isTerminator = 1, isBarrier = 1, hasCtrlDep = 1 in {
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstr64Bit.td | 110 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7 in {
276 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7,
282 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7,
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| D | PPCInstrInfo.td | 1018 let hasCtrlDep = 1 in {
1128 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7 in {
1212 let isCall = 1, hasCtrlDep = 1, isCodeGenOnly = 1, PPC970_Unit = 7 in {
1341 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7,
1347 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7,
1561 let isTerminator = 1, isBarrier = 1, hasCtrlDep = 1 in
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| /external/llvm/docs/TableGen/ |
| D | index.rst | 123 bit hasCtrlDep = 0;
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| D | LangIntro.rst | 537 let isTerminator = 1, isReturn = 1, isBarrier = 1, hasCtrlDep = 1 in
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.td | 985 let hasCtrlDep = 1 in
990 let hasCtrlDep = 1 in
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.td | 1263 let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1, hasCtrlDep=1 in
1266 let isReturn=1, isTerminator=1, isBarrier=1, hasCtrlDep=1, hasSideEffects=1 in
1580 let hasCtrlDep = 1;
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| D | Mips16InstrInfo.td | 1388 let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1, hasCtrlDep=1,
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | R600Instructions.td | 1159 let isTerminator = 1, isReturn = 1, isBarrier = 1, hasCtrlDep = 1 in {
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| D | SIInstructions.td | 605 let hasCtrlDep = 1;
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600Instructions.td | 1543 let isTerminator = 1, isReturn = 1, hasCtrlDep = 1,
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| D | SIInstructions.td | 439 let hasCtrlDep = 1;
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.td | 36 let isReturn = 1, isTerminator = 1, isBarrier = 1, hasCtrlDep = 1 in
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