/external/proguard/src/proguard/optimize/info/ |
D | SideEffectInstructionChecker.java | 60 private boolean hasSideEffects; field in SideEffectInstructionChecker 82 public boolean hasSideEffects(Clazz clazz, in hasSideEffects() method in SideEffectInstructionChecker 88 hasSideEffects = false; in hasSideEffects() 92 return hasSideEffects; in hasSideEffects() 127 hasSideEffects = OPTIMIZE_CONSERVATIVELY; in visitSimpleInstruction() 142 hasSideEffects = true; in visitSimpleInstruction() 152 hasSideEffects = includeReturnInstructions; in visitSimpleInstruction() 167 hasSideEffects = includeReturnInstructions; in visitVariableInstruction() 197 hasSideEffects = true; in visitConstantInstruction() 212 hasSideEffects = true; in visitConstantInstruction() [all …]
|
D | SideEffectMethodMarker.java | 50 private boolean hasSideEffects; field in SideEffectMethodMarker 83 if (!hasSideEffects(programMethod) && in visitProgramMethod() 87 hasSideEffects = in visitProgramMethod() 93 if (!hasSideEffects) in visitProgramMethod() 100 if (hasSideEffects) in visitProgramMethod() 118 hasSideEffects = hasSideEffects(clazz, method, codeAttribute); in visitCodeAttribute() 127 private boolean hasSideEffects(Clazz clazz, in hasSideEffects() method in SideEffectMethodMarker 147 if (checker.hasSideEffects(clazz, in hasSideEffects() 175 public static boolean hasSideEffects(Method method) in hasSideEffects() method in SideEffectMethodMarker 179 info.hasSideEffects(); in hasSideEffects()
|
D | MethodOptimizationInfo.java | 36 private boolean hasSideEffects = false; field in MethodOptimizationInfo 88 hasSideEffects = true; in setSideEffects() 92 public boolean hasSideEffects() in hasSideEffects() method in MethodOptimizationInfo 94 return hasSideEffects; in hasSideEffects() 284 this.hasSideEffects |= other.hasSideEffects; in merge() 297 this.hasSideEffects = true; in merge()
|
D | SideEffectMethodFilter.java | 59 if (SideEffectMethodMarker.hasSideEffects(programMethod)) in visitProgramMethod() 68 if (SideEffectMethodMarker.hasSideEffects(libraryMethod)) in visitLibraryMethod()
|
/external/llvm/lib/Target/Hexagon/ |
D | HexagonIsetDx.td | 15 let isCodeGenOnly = 1, hasSideEffects = 0 in 32 … isPredicated = 1, isPredicatedFalse = 1, isBranch = 1, isIndirectBranch = 1, hasSideEffects = 0 in 63 let isCodeGenOnly = 1, hasSideEffects = 0 in 93 let Uses = [P0], isCodeGenOnly = 1, isPredicated = 1, isPredicatedNew = 1, hasSideEffects = 0, hasN… 122 …1, isPredicated = 1, isPredicatedNew = 1, isBranch = 1, isIndirectBranch = 1, hasSideEffects = 0 in 132 let isCodeGenOnly = 1, hasSideEffects = 0, hasNewValue = 1, opNewValue = 0, isExtendable = 1, isExt… 180 let Defs = [P0], isCodeGenOnly = 1, hasSideEffects = 0 in 194 let isCodeGenOnly = 1, hasSideEffects = 0 in 277 … = [PC], Uses = [R31], isCodeGenOnly = 1, isBranch = 1, isIndirectBranch = 1, hasSideEffects = 0 in 287 let isCodeGenOnly = 1, hasSideEffects = 0 in [all …]
|
D | HexagonInstrInfoV3.td | 24 let isCall = 1, hasSideEffects = 1, Defs = VolatileV3.Regs, isPredicable = 1, 39 let isCall = 1, hasSideEffects = 1, Defs = VolatileV3.Regs, isPredicated = 1, 67 let isCodeGenOnly = 1, isCall = 1, hasSideEffects = 1, Defs = VolatileV3.Regs in 101 let hasSideEffects = 0, isAsmParserOnly = 1 in 109 let hasSideEffects = 0 in 193 let Defs = [USR_OVF], hasSideEffects = 0 in 216 let hasSideEffects = 0, isAsmParserOnly = 1 in 222 let Defs = [USR_OVF], hasSideEffects = 0 in
|
D | HexagonInstrInfo.td | 66 let hasSideEffects = 0, isCompare = 1, InputType = "imm", isExtendable = 1, 118 let hasSideEffects = 0, hasNewValue = 1, InputType = "reg" in 141 let hasSideEffects = 0, hasNewValue = 1 in 255 let hasSideEffects = 0, hasNewValue = 1, isCompare = 1, InputType = "reg" in 310 let hasSideEffects = 0; 349 let hasNewValue = 1, hasSideEffects = 0 in 375 let hasNewValue = 1, hasSideEffects = 0 in 454 opExtentBits = 10, InputType = "imm", hasNewValue = 1, hasSideEffects = 0 in 471 let hasSideEffects = 0 in 484 let hasSideEffects = 0, hasNewValue = 1 in [all …]
|
D | HexagonInstrInfoV4.td | 36 let hasSideEffects = 0 in 172 let hasSideEffects = 0; 217 let hasSideEffects = 0; 293 let hasSideEffects = 0, isExtentSigned = 1, isExtendable = 1, 329 let hasSideEffects = 0, isExtendable = 1, opExtentBits = 6, opExtendable = 2 in 395 hasSideEffects = 0 in 597 let hasSideEffects = 0, addrMode = BaseRegOffset in 1018 let addrMode = BaseRegOffset, InputType = "reg", hasSideEffects = 0 in { 1152 let hasSideEffects = 0, addrMode = BaseImmOffset, 1339 let mayStore = 1, isNVStore = 1, isNewValue = 1, hasSideEffects = 0, [all …]
|
D | HexagonInstrInfoV60.td | 16 let mayStore = 1, validSubTargets = HasV60SubT, hasSideEffects = 0 in 27 let mayLoad = 1, validSubTargets = HasV60SubT, hasSideEffects = 0 in 34 let mayStore = 1, validSubTargets = HasV60SubT, hasSideEffects = 0 in 874 isCodeGenOnly = 1, isPseudo = 1, mayStore = 1, hasSideEffects = 0 in { 902 opExtentAlign = 2, isCodeGenOnly = 1, isPseudo = 1, hasSideEffects = 0 in { 927 isCodeGenOnly = 1, isPseudo = 1, mayStore = 1, hasSideEffects = 0 in { 941 isCodeGenOnly = 1, isPseudo = 1, mayStore = 1, hasSideEffects = 0 in { 956 opExtentAlign = 2, isCodeGenOnly = 1, isPseudo = 1, hasSideEffects = 0 in { 970 opExtentAlign = 2, isCodeGenOnly = 1, isPseudo = 1, hasSideEffects = 0 in { 988 let isCodeGenOnly = 1, isPseudo = 1, hasSideEffects = 0 in { [all …]
|
/external/llvm/lib/Target/AMDGPU/ |
D | SIInstrFormats.td | 99 let hasSideEffects = 0; 250 let hasSideEffects = 0; 261 let hasSideEffects = 0; 274 let hasSideEffects = 0; 288 let hasSideEffects = 0; 300 let hasSideEffects = 0; 316 let hasSideEffects = 0; 612 let hasSideEffects = 0; 633 let hasSideEffects = 0; 646 let hasSideEffects = 0; [all …]
|
D | R600Instructions.td | 85 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in { 214 } // End mayLoad = 1, mayStore = 0, hasSideEffects = 0 772 let hasSideEffects = 1 in { 776 } // end hasSideEffects 843 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in { 878 } // End mayLoad = 0, mayStore = 0, hasSideEffects = 0 1002 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in { 1018 } // End mayLoad = 0, mayStore = 0, hasSideEffects = 0 1319 let mayLoad = 0, mayStore = 0, hasSideEffects = 1 in { 1328 } // End mayLoad = 0, mayStore = 0, hasSideEffects = 1 [all …]
|
/external/llvm/lib/IR/ |
D | InlineAsm.cpp | 28 StringRef Constraints, bool hasSideEffects, in get() argument 30 InlineAsmKeyType Key(AsmString, Constraints, FTy, hasSideEffects, in get() 37 const std::string &constraints, bool hasSideEffects, in InlineAsm() argument 41 HasSideEffects(hasSideEffects), IsAlignStack(isAlignStack), in InlineAsm()
|
/external/clang/lib/ARCMigrate/ |
D | TransEmptyStatementsAndDealloc.cpp | 103 if (hasSideEffects(condE, Ctx)) in VisitIfStmt() 115 if (hasSideEffects(condE, Ctx)) in VisitWhileStmt() 125 if (hasSideEffects(condE, Ctx)) in VisitDoStmt() 135 if (hasSideEffects(Exp, Ctx)) in VisitObjCForCollectionStmt()
|
/external/llvm/include/llvm/IR/ |
D | InlineAsm.h | 53 const std::string &Constraints, bool hasSideEffects, 65 StringRef Constraints, bool hasSideEffects, 69 bool hasSideEffects() const { return HasSideEffects; } in hasSideEffects() function
|
/external/llvm/lib/Target/X86/ |
D | X86InstrExtension.td | 14 let hasSideEffects = 0 in { 42 let hasSideEffects = 0 in { 50 } // hasSideEffects = 0 68 let hasSideEffects = 0 in { 76 } // hasSideEffects = 0 97 let hasSideEffects = 0, isCodeGenOnly = 1 in {
|
D | X86InstrArithmetic.td | 18 let hasSideEffects = 0 in 68 let Defs = [AX,DX,EFLAGS], Uses = [AX], hasSideEffects = 0 in 73 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX], hasSideEffects = 0 in 79 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX], hasSideEffects = 0 in 94 let mayLoad = 1, hasSideEffects = 0 in { 110 let hasSideEffects = 0 in { 148 } // hasSideEffects 295 let hasSideEffects = 1 in { // so that we don't speculatively execute 367 } // hasSideEffects = 0 474 let CodeSize = 1, hasSideEffects = 0 in { [all …]
|
D | X86InstrControl.td | 75 let hasSideEffects = 0, isCodeGenOnly = 1, ForceDisassemble = 1 in { 88 let hasSideEffects = 0, isCodeGenOnly = 1, ForceDisassemble = 1 in { 115 let isBranch = 1, isTerminator = 1, hasSideEffects = 0, SchedRW = [WriteJump] in { 199 let hasSideEffects = 0 in
|
/external/llvm/lib/Target/XCore/ |
D | XCoreInstrInfo.td | 374 let hasSideEffects = 1 in 385 let hasSideEffects = 0 in { 436 let hasSideEffects = 0 in 447 let hasSideEffects = 0 in 466 let hasSideEffects = 1 in { 542 let hasSideEffects = 0, isReMaterializable = 1 in 568 let mayLoad = 1, isReMaterializable = 1, hasSideEffects = 0 in { 597 let hasSideEffects = 0 in { 632 let hasSideEffects = 0 in 643 let hasSideEffects = 0 in [all …]
|
/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 833 let mayLoad = 0, mayStore = 0, hasSideEffects = 1 in 859 let mayStore = 1, mayLoad = 1, hasSideEffects = 1 in 1071 let mayLoad = 0, mayStore = 0, hasSideEffects = 1, isReturn = 1 in 1272 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in 1287 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in 1563 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in 1591 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in 1703 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in 1738 let hasSideEffects = 0, isReMaterializable = 1, isAsCheapAsAMove = 1 in { 1771 let AddedComplexity = 1, hasSideEffects = 0 in { [all …]
|
/external/llvm/lib/Target/SystemZ/ |
D | SystemZInstrInfo.td | 19 let hasSideEffects = 0 in { 276 let hasSideEffects = 0 in { 299 let hasSideEffects = 0, isAsCheapAsAMove = 1, isMoveImm = 1, 415 let hasSideEffects = 0 in { 421 let hasSideEffects = 0 in { 465 let hasSideEffects = 0 in { 477 let hasSideEffects = 0 in { 559 let hasSideEffects = 0 in { 579 let hasSideEffects = 0, isAsCheapAsAMove = 1, isReMaterializable = 1, 593 let hasSideEffects = 0, isAsCheapAsAMove = 1, isMoveImm = 1, [all …]
|
/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyInstrInteger.td | 25 let hasSideEffects = 1 in { 30 } // hasSideEffects = 1
|
D | WebAssemblyInstrConv.td | 39 let hasSideEffects = 1 in { 64 } // hasSideEffects = 1
|
/external/llvm/lib/Target/PowerPC/ |
D | PPCInstr64Bit.td | 239 let mayLoad = 1, hasSideEffects = 0 in { 249 let Defs = [CR0], mayStore = 1, hasSideEffects = 0 in 301 let hasSideEffects = 0 in { 318 } // hasSideEffects = 0 320 let hasSideEffects = 1, isBarrier = 1, usesCustomInserter = 1 in { 352 let hasSideEffects = 1, Defs = [CTR8] in { 393 let hasSideEffects = 0 in { 544 let isCompare = 1, hasSideEffects = 0 in { 556 let hasSideEffects = 0 in { 660 let hasSideEffects = 0 in { [all …]
|
/external/llvm/include/llvm/Target/ |
D | Target.td | 403 // hasSideEffects - The instruction has side effects that are not 406 bit hasSideEffects = ?; 722 // The instruction properties mayLoad, mayStore, and hasSideEffects are unset 768 let hasSideEffects = 0; // Note side effect is encoded in an operand. 795 let hasSideEffects = 0; 801 let hasSideEffects = 0; 807 let hasSideEffects = 0; 814 let hasSideEffects = 0; 822 let hasSideEffects = 0; 828 let hasSideEffects = 0; [all …]
|
/external/llvm/utils/TableGen/ |
D | CodeGenDAGPatterns.cpp | 2742 bool hasSideEffects; member in InstAnalyzer 2749 : CDP(cdp), hasSideEffects(false), mayStore(false), mayLoad(false), in InstAnalyzer() 2763 if (hasSideEffects || mayLoad || mayStore || isVariadic) in IsNodeBitcast() 2795 if (CP.hasProperty(SDNPSideEffect)) hasSideEffects = true; in AnalyzeNode() 2814 if (N->NodeHasProperty(SDNPSideEffect, CDP)) hasSideEffects = true; in AnalyzeNode() 2827 hasSideEffects = true; in AnalyzeNode() 2843 if (InstInfo.hasSideEffects != PatInfo.hasSideEffects && in InferFromPattern() 2848 if (!InstInfo.hasSideEffects) { in InferFromPattern() 2851 Twine(InstInfo.hasSideEffects)); in InferFromPattern() 2872 InstInfo.hasSideEffects |= PatInfo.hasSideEffects; in InferFromPattern() [all …]
|