Searched refs:hasV8Ops (Results 1 – 6 of 6) sorted by relevance
241 RestrictIT = hasV8Ops(); in initSubtargetFeatures()
316 bool hasV8Ops() const { return HasV8Ops; } in hasV8Ops() function
563 if (Subtarget->hasV8Ops()) in getArchForCPU()666 if (STI.hasV8Ops()) in emitAttributes()794 if (STI.hasDivideInARMMode() && !STI.hasV8Ops()) in emitAttributes()
212 def HasV8 : Predicate<"Subtarget->hasV8Ops()">,214 def PreV8 : Predicate<"!Subtarget->hasV8Ops()">,
848 if (!Subtarget->hasV8Ops()) { in ARMTargetLowering()
269 bool hasV8Ops() const { in hasV8Ops() function in __anon59ff32670111::ARMAsmParser3220 if ((hasV7Ops() || hasV8Ops()) && (Num == 10 || Num == 11)) in parseCoprocNumOperand()3794 if (!hasV8Ops() && (Opt == ARM_MB::ISHLD || Opt == ARM_MB::OSHLD || in parseMemBarrierOptOperand()6131 if (RmReg == ARM::SP && !hasV8Ops()) in validateInstruction()8555 if ((Inst.getOperand(I).getReg() == ARM::SP) && !hasV8Ops()) in checkTargetMatchPredicate()8602 if (wasInITBlock && hasV8Ops() && isThumb() && in MatchAndEmitInstruction()10024 if (hasV8Ops() && Op.isReg() && Op.getReg() == ARM::SP) in validateTargetOperandClass()