| /external/llvm/lib/CodeGen/ |
| D | CalcSpillWeights.cpp | 49 unsigned sub, hreg, hsub; in copyHint() local
52 hreg = mi->getOperand(1).getReg(); in copyHint()
56 hreg = mi->getOperand(0).getReg(); in copyHint()
60 if (!hreg) in copyHint()
63 if (TargetRegisterInfo::isVirtualRegister(hreg)) in copyHint()
64 return sub == hsub ? hreg : 0; in copyHint()
70 return rc->contains(hreg) ? hreg : 0; in copyHint()
73 return tri.getMatchingSuperReg(hreg, sub, rc); in copyHint()
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| /external/opencv3/modules/hal/include/opencv2/hal/ |
| D | intrin_neon.hpp | 255 #define OPENCV_HAL_IMPL_NEON_PACK(_Tpvec, _Tp, hreg, suffix, _Tpwvec, wsuffix, pack, op) \ in OPENCV_HAL_IMPL_NEON_INIT() argument
258 hreg a1 = vqmov##op##_##wsuffix(a.val), b1 = vqmov##op##_##wsuffix(b.val); \ in OPENCV_HAL_IMPL_NEON_INIT()
263 hreg a1 = vqmov##op##_##wsuffix(a.val); \
269 hreg a1 = vqrshr##op##_n_##wsuffix(a.val, n); \
270 hreg b1 = vqrshr##op##_n_##wsuffix(b.val, n); \
276 hreg a1 = vqrshr##op##_n_##wsuffix(a.val, n); \
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| /external/valgrind/VEX/priv/ |
| D | host_tilegx_isel.c | 1782 HReg hreg; in iselSB_TILEGX() local
1817 hreg = INVALID_HREG; in iselSB_TILEGX()
1823 hreg = mkHReg(True, HRcInt64, 0, j++); in iselSB_TILEGX()
1826 hreg = mkHReg(True, HRcInt64, 0, j++); in iselSB_TILEGX()
1832 env->vregmap[i] = hreg; in iselSB_TILEGX()
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| D | host_mips_isel.c | 4167 HReg hreg, hregHI; in iselSB_MIPS() local
4216 hregHI = hreg = INVALID_HREG; in iselSB_MIPS()
4223 hreg = mkHReg(True, HRcInt64, 0, j++); in iselSB_MIPS()
4226 hreg = mkHReg(True, HRcInt32, 0, j++); in iselSB_MIPS()
4231 hreg = mkHReg(True, HRcInt64, 0, j++); in iselSB_MIPS()
4234 hreg = mkHReg(True, HRcInt32, 0, j++); in iselSB_MIPS()
4240 hreg = mkHReg(True, HRcInt64, 0, j++); in iselSB_MIPS()
4245 hreg = mkHReg(True, HRcFlt64, 0, j++); in iselSB_MIPS()
4248 hreg = mkHReg(True, HRcFlt32, 0, j++); in iselSB_MIPS()
4252 hreg = mkHReg(True, HRcFlt64, 0, j++); in iselSB_MIPS()
[all …]
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| D | host_arm64_isel.c | 4033 HReg hreg, hregHI; in iselSB_ARM64() local
4073 hregHI = hreg = INVALID_HREG; in iselSB_ARM64()
4077 hreg = mkHReg(True, HRcInt64, 0, j++); in iselSB_ARM64()
4080 hreg = mkHReg(True, HRcInt64, 0, j++); in iselSB_ARM64()
4086 hreg = mkHReg(True, HRcFlt64, 0, j++); in iselSB_ARM64()
4089 hreg = mkHReg(True, HRcVec128, 0, j++); in iselSB_ARM64()
4092 hreg = mkHReg(True, HRcVec128, 0, j++); in iselSB_ARM64()
4099 env->vregmap[i] = hreg; in iselSB_ARM64()
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| D | host_s390_isel.c | 4100 HReg hreg, hregHI; in iselSB_S390() local
4149 hregHI = hreg = INVALID_HREG; in iselSB_S390()
4156 hreg = mkVRegI(j++); in iselSB_S390()
4160 hreg = mkVRegI(j++); in iselSB_S390()
4168 hreg = mkVRegF(j++); in iselSB_S390()
4173 hreg = mkVRegF(j++); in iselSB_S390()
4183 env->vregmap[i] = hreg; in iselSB_S390()
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| D | host_x86_isel.c | 4431 HReg hreg, hregHI; in iselSB_X86() local
4473 hregHI = hreg = INVALID_HREG; in iselSB_X86()
4478 case Ity_I32: hreg = mkHReg(True, HRcInt32, 0, j++); break; in iselSB_X86()
4479 case Ity_I64: hreg = mkHReg(True, HRcInt32, 0, j++); in iselSB_X86()
4482 case Ity_F64: hreg = mkHReg(True, HRcFlt64, 0, j++); break; in iselSB_X86()
4483 case Ity_V128: hreg = mkHReg(True, HRcVec128, 0, j++); break; in iselSB_X86()
4487 env->vregmap[i] = hreg; in iselSB_X86()
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| D | host_amd64_isel.c | 4934 HReg hreg, hregHI; in iselSB_AMD64() local
4978 hregHI = hreg = INVALID_HREG; in iselSB_AMD64()
4982 hreg = mkHReg(True, HRcInt64, 0, j++); in iselSB_AMD64()
4985 hreg = mkHReg(True, HRcInt64, 0, j++); in iselSB_AMD64()
4991 hreg = mkHReg(True, HRcVec128, 0, j++); in iselSB_AMD64()
4994 hreg = mkHReg(True, HRcVec128, 0, j++); in iselSB_AMD64()
5001 env->vregmap[i] = hreg; in iselSB_AMD64()
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| D | host_arm_isel.c | 6342 HReg hreg, hregHI; in iselSB_ARM() local
6384 hregHI = hreg = INVALID_HREG; in iselSB_ARM()
6389 case Ity_I32: hreg = mkHReg(True, HRcInt32, 0, j++); break; in iselSB_ARM()
6392 hreg = mkHReg(True, HRcFlt64, 0, j++); in iselSB_ARM()
6395 hreg = mkHReg(True, HRcInt32, 0, j++); in iselSB_ARM()
6398 case Ity_F32: hreg = mkHReg(True, HRcFlt32, 0, j++); break; in iselSB_ARM()
6399 case Ity_F64: hreg = mkHReg(True, HRcFlt64, 0, j++); break; in iselSB_ARM()
6400 case Ity_V128: hreg = mkHReg(True, HRcVec128, 0, j++); break; in iselSB_ARM()
6404 env->vregmap[i] = hreg; in iselSB_ARM()
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| /external/vixl/src/vixl/a64/ |
| D | simulator-a64.cc | 1119 case STR_h: Memory::Write<uint16_t>(address, hreg(srcdst)); break; in LoadStoreHelper()
2181 case FCVT_sh: set_sreg(fd, FPToFloat(hreg(fn))); return; in VisitFPDataProcessing1Source()
2182 case FCVT_dh: set_dreg(fd, FPToDouble(FPToFloat(hreg(fn)))); return; in VisitFPDataProcessing1Source()
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| D | simulator-a64.h | 882 int16_t hreg(unsigned code) const { in hreg() function
|