| /external/llvm/include/llvm/MC/ |
| D | MCInstrAnalysis.h | 34 virtual bool isBranch(const MCInst &Inst) const { in isBranch() function
35 return Info->get(Inst.getOpcode()).isBranch(); in isBranch()
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| D | MCInstrDesc.h | 233 bool isBranch() const { return Flags & (1 << MCID::Branch); } in isBranch() function
244 return isBranch() & !isBarrier() & !isIndirectBranch(); in isConditionalBranch()
252 return isBranch() & isBarrier() & !isIndirectBranch(); in isUnconditionalBranch()
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCCodeEmitter.cpp | 279 if (MCID.isBranch()) in getFixupNoBits()
284 } else if (MCID.isBranch()) in getFixupNoBits()
489 if (MCID.isBranch() || MCID.isCall()) { in getExprOpValue()
572 if (MCID.isBranch() || MCID.isCall()) in getExprOpValue()
578 if (MCID.isBranch()) in getExprOpValue()
646 if (MCID.isBranch() || in getExprOpValue()
668 if (MCID.isBranch() || in getExprOpValue()
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| D | HexagonShuffler.cpp | 262 if (HexagonMCInstrInfo::getDesc(MCII, *ID).isBranch()) in check()
311 if (HexagonMCInstrInfo::getDesc(MCII, *ID).isBranch() || in check()
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| D | HexagonMCInstrInfo.cpp | 135 XMI.setOpcode((Desc.isBranch() || Desc.isCall() || in deriveExtender()
407 HexagonMCInstrInfo::getDesc(MCII, MCI).isBranch()) || in isConstExtended()
409 HexagonMCInstrInfo::getDesc(MCII, MCI).isBranch())) in isConstExtended()
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| D | HexagonMCChecker.cpp | 214 if (MCID.isBranch()) in init()
280 if (HexagonMCInstrInfo::getDesc(MCII, MCI).isBranch() || in checkBranches()
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| D | HexagonAsmBackend.cpp | 186 MCID.isBranch()) || in isInstRelaxable()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonIsetDx.td | 32 … [P0, R31], isCodeGenOnly = 1, isPredicated = 1, isPredicatedFalse = 1, isBranch = 1, isIndirectBr…
53 …= 1, isPredicatedFalse = 1, mayLoad = 1, accessSize = DoubleWordAccess, isBranch = 1, isIndirectBr…
122 … = [P0, R31], isCodeGenOnly = 1, isPredicated = 1, isPredicatedNew = 1, isBranch = 1, isIndirectBr…
211 …Only = 1, isPredicated = 1, mayLoad = 1, accessSize = DoubleWordAccess, isBranch = 1, isIndirectBr…
277 let Defs = [PC], Uses = [R31], isCodeGenOnly = 1, isBranch = 1, isIndirectBranch = 1, hasSideEffect…
536 …Only = 1, isPredicated = 1, isPredicatedFalse = 1, isPredicatedNew = 1, isBranch = 1, isIndirectBr…
560 …= [R30], isCodeGenOnly = 1, mayLoad = 1, accessSize = DoubleWordAccess, isBranch = 1, isIndirectBr…
599 let Defs = [PC], Uses = [P0, R31], isCodeGenOnly = 1, isPredicated = 1, isBranch = 1, isIndirectBra…
696 …d = 1, isPredicatedNew = 1, mayLoad = 1, accessSize = DoubleWordAccess, isBranch = 1, isIndirectBr…
706 …e = 1, isPredicatedNew = 1, mayLoad = 1, accessSize = DoubleWordAccess, isBranch = 1, isIndirectBr…
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| D | Hexagon.td | 200 let RowFields = ["BaseOpcode", "PNewValue", "PredSense", "isBranch", "isPredicated"];
208 let RowFields = ["BaseOpcode", "PNewValue", "PredSense", "isBranch", "isPredicated"];
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| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86Disassembler.cpp | 206 static bool tryAddingSymbolicOperand(int64_t Value, bool isBranch, in tryAddingSymbolicOperand() argument
210 return Dis->tryAddingSymbolicOperand(MI, Value, Address, isBranch, in tryAddingSymbolicOperand()
296 bool isBranch = false; in translateImmediate() local
299 isBranch = true; in translateImmediate()
554 isBranch = true; in translateImmediate()
560 isBranch = true; in translateImmediate()
567 isBranch = true; in translateImmediate()
577 if(!tryAddingSymbolicOperand(immediate + pcrel, isBranch, insn.startLocation, in translateImmediate()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrControl.td | 17 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
30 } // isBranch = 1, isTerminator = 1, hasCtrlDep = 1
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| D | WebAssemblyCFGStackify.cpp | 201 if (!MBB.empty() && MBB.back().isTerminator() && !MBB.back().isBranch() && in SortBlocks()
205 if (MBB.empty() || !MBB.back().isTerminator() || MBB.back().isBranch()) in SortBlocks()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCHazardRecognizers.cpp | 61 if (!MCID->isBranch()) in isBCTRAfterSet()
178 if (CurSlots == 5 || (MCID->isBranch() && CurBranches == 1)) { in EmitInstruction()
199 if (MCID->isBranch()) in EmitInstruction()
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| D | PPCEarlyReturn.cpp | 123 } else if (J->isBranch()) { in processBlock()
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| /external/llvm/lib/MC/ |
| D | MCInstrDesc.cpp | 35 if (isBranch() || isCall() || isReturn() || isIndirectBranch()) in mayAffectControlFlow()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.cpp | 163 if (MI->isBranch() && !MI->isBarrier()) in isUnpredicatedTerminator()
190 if (!I->isBranch()) in AnalyzeBranch()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrTSX.td | 26 let isBranch = 1, isTerminator = 1, Defs = [EAX] in {
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| D | X86InstrControl.td | 72 let isBarrier = 1, isBranch = 1, isTerminator = 1, SchedRW = [WriteJump] in {
84 let isBranch = 1, isTerminator = 1, Uses = [EFLAGS], SchedRW = [WriteJump] in {
115 let isBranch = 1, isTerminator = 1, hasSideEffects = 0, SchedRW = [WriteJump] in {
134 let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstr.h | 434 bool isBranch(QueryType Type = AnyInBundle) const {
449 return isBranch(Type) & !isBarrier(Type) & !isIndirectBranch(Type);
457 return isBranch(Type) & isBarrier(Type) & !isIndirectBranch(Type);
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| /external/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.cpp | 98 if (!I->isBranch()) in AnalyzeBranch()
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_debug.cpp | 359 if (TID.isBranch()) {
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.td | 623 let isBranch = 1, isTerminator = 1 in {
649 let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
677 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1,
958 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in
963 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in
968 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in
973 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in
1107 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1,
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| /external/llvm/utils/TableGen/ |
| D | CodeGenInstruction.h | 226 bool isBranch : 1; variable
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb2ITBlockPass.cpp | 217 (!MI->isBranch() && !MI->isReturn()) ; ++MBBI) { in InsertITInstructions()
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| /external/llvm/lib/Target/Mips/ |
| D | MicroMipsInstrInfo.td | 182 let isBranch = 1;
433 let isBranch = 1;
443 let isBranch = 1;
462 let isBranch = 1;
475 let isBranch = 1;
578 let isBranch = 1;
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