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Searched refs:kSRegSize (Results 1 – 18 of 18) sorted by relevance

/external/vixl/src/vixl/a64/
Dlogic-a64.cc3891 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) { \
3933 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) { in frecps()
3963 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) { in frsqrts()
4006 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) { in fcmp()
4021 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) { in fcmp_zero()
4040 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) { in fabscmp()
4075 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) { in fmla()
4106 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) { in fmls()
4133 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) { in fneg()
4162 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) { in fabs_()
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Dinstructions-a64.h65 const unsigned kSRegSize = 32; variable
67 const unsigned kSRegSizeInBytes = kSRegSize / 8;
Dinstructions-a64.cc494 case kFormatS: return kSRegSize; in RegisterSizeInBitsFromFormat()
Dmacro-assembler-a64.h824 PushSizeRegList(regs, kSRegSize, CPURegister::kVRegister); in PushSRegList()
827 PopSizeRegList(regs, kSRegSize, CPURegister::kVRegister); in PopSRegList()
888 PeekSizeRegList(regs, offset, kSRegSize, CPURegister::kVRegister); in PeekSRegList()
891 PokeSizeRegList(regs, offset, kSRegSize, CPURegister::kVRegister); in PokeSRegList()
Dassembler-a64.h150 (size_ == kSRegSize) || (size_ == kDRegSize) || in IsValidVRegister()
330 bool IsLaneSizeS() const { return LaneSizeInBits() == kSRegSize; } in IsLaneSizeS()
392 const VRegister s##N(N, kSRegSize); \
Ddisasm-a64.cc2667 case kSRegSize: reg_char = 's'; break; in AppendRegisterNameToOutput()
2910 reg_type = CPURegister::kVRegister; reg_size = kSRegSize; break; in SubstituteRegisterField()
Dsimulator-a64.h914 case kSRegSize: raw = vreg<uint32_t>(code); break; in vreg()
Dassembler-a64.cc5301 case kSRegSize: return LDR_s; in LoadOpFor()
5320 case kSRegSize: return STR_s; in StoreOpFor()
/external/vixl/examples/
Dneon-matrix-multiply.cc50 VRegister v_in = VRegister(in_column, kSRegSize); in GenerateMultiplyColumn()
/external/v8/test/cctest/
Dtest-utils-arm64.h166 STATIC_ASSERT(sizeof(for_sizeof().s_[0]) == kSRegSize);
Dtest-utils-arm64.cc387 MemOperand(dump, i * kSRegSize)); in Dump()
Dtest-assembler-arm64.cc7896 __ Str(s0, MemOperand(x0, fbits * kSRegSize)); in TestUScvtf32Helper()
7897 __ Str(s1, MemOperand(x1, fbits * kSRegSize)); in TestUScvtf32Helper()
7898 __ Str(s2, MemOperand(x2, fbits * kSRegSize)); in TestUScvtf32Helper()
7899 __ Str(s3, MemOperand(x3, fbits * kSRegSize)); in TestUScvtf32Helper()
7907 __ Str(s0, MemOperand(x0, fbits * kSRegSize)); in TestUScvtf32Helper()
7908 __ Str(s1, MemOperand(x1, fbits * kSRegSize)); in TestUScvtf32Helper()
/external/v8/src/arm64/
Dsimulator-arm64.h452 if (sizeof(value) <= kSRegSize) {
479 DCHECK((sizeof(value) == kDRegSize) || (sizeof(value) == kSRegSize));
540 kPrintSRegValue = 1 << kSRegSize,
Dsimulator-arm64.cc1197 case kSRegSize: in PrintReadFP()
1261 case kSRegSize: in PrintWriteFP()
1728 DCHECK(access_size == kSRegSize); in LoadStorePairHelper()
1758 DCHECK(access_size == kSRegSize); in LoadStorePairHelper()
1833 LogReadFP(address, kSRegSize, rt); in VisitLoadLiteral()
Dconstants-arm64.h55 const int kSRegSize = kSRegSizeInBits >> 3; variable
/external/vixl/test/
Dtest-simulator-a64.cc202 VIXL_ASSERT((d_size == kDRegSize) || (d_size == kSRegSize)); in Test1Op_Helper()
203 VIXL_ASSERT((n_size == kDRegSize) || (n_size == kSRegSize)); in Test1Op_Helper()
307 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize)); in Test2Op_Helper()
427 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize)); in Test3Op_Helper()
562 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize)); in TestCmp_Helper()
691 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize)); in TestCmpZero_Helper()
809 VIXL_ASSERT((n_size == kDRegSize) || (n_size == kSRegSize)); in TestFPToFixed_Helper()
858 VIXL_ASSERT((n_size == kDRegSize) || (n_size == kSRegSize)); in TestFPToInt_Helper()
Dtest-utils-a64.cc286 s[i] = FPRegister(n, kSRegSize); in PopulateFPRegisterArray()
Dtest-assembler-a64.cc13108 rawbits_to_double((base_d >> kSRegSize) | ((2 * base_d) << kSRegSize)), in TEST()
13112 ASSERT_EQUAL_FP32(rawbits_to_float((4 * base_d) >> kSRegSize), s17); in TEST()
13206 VIXL_CHECK(array[12] == ((1 * low_base) << kSRegSize)); in TEST()
13207 VIXL_CHECK(array[13] == (((2 * low_base) << kSRegSize) | (1 * high_base))); in TEST()
13208 VIXL_CHECK(array[14] == (((3 * low_base) << kSRegSize) | (2 * high_base))); in TEST()
13209 VIXL_CHECK(array[15] == (((4 * low_base) << kSRegSize) | (3 * high_base))); in TEST()
13210 VIXL_CHECK(array[16] == (((1 * low_base) << kSRegSize) | (4 * high_base))); in TEST()
13211 VIXL_CHECK(array[17] == (((2 * low_base) << kSRegSize) | (1 * high_base))); in TEST()
13212 VIXL_CHECK(array[18] == (((3 * low_base) << kSRegSize) | (2 * high_base))); in TEST()
13213 VIXL_CHECK(array[19] == (((4 * low_base) << kSRegSize) | (3 * high_base))); in TEST()
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