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Searched refs:lwu (Results 1 – 25 of 43) sorted by relevance

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/external/llvm/test/CodeGen/Mips/
Dmips64signextendsesf.ll16 ; CHECK-NOT: lwu
30 ; CHECK-NOT: lwu
44 ; CHECK-NOT: lwu
58 ; CHECK-NOT: lwu
72 ; CHECK-NOT: lwu
86 ; CHECK-NOT: lwu
98 ; CHECK-NOT: lwu
110 ; CHECK-NOT: lwu
124 ; CHECK-NOT: lwu
141 ; CHECK-NOT: lwu
[all …]
Dmips64intldst.ll96 ; CHECK-N64: lwu ${{[0-9]+}}, 0($[[R0]])
99 ; CHECK-N32: lwu ${{[0-9]+}}, 0($[[R0]])
Ddynamic-stack-realignment.ll255 ; N64-DAG: lwu $[[T0:[0-9]+]], 1028($fp)
/external/llvm/test/MC/Mips/
Dmicromips-loadstore-instructions.s25 # CHECK-EL: lwu $2, 8($4) # encoding: [0x44,0x60,0x08,0xe0]
71 # CHECK-EB: lwu $2, 8($4) # encoding: [0x60,0x44,0xe0,0x08]
114 lwu $2, 8($4)
/external/valgrind/none/tests/mips64/
Dload_store.stdout.exp-LE22657 lwu :: offset: 0x0, out: 0x0
22658 lwu :: offset: 0x4, out: 0x0
22659 lwu :: offset: 0x8, out: 0x9823b6e
22660 lwu :: offset: 0xc, out: 0xd4326d9
22661 lwu :: offset: 0x10, out: 0x130476dc
22662 lwu :: offset: 0x14, out: 0x17c56b6b
22663 lwu :: offset: 0x18, out: 0x1a864db2
22664 lwu :: offset: 0x1c, out: 0x1e475005
22665 lwu :: offset: 0x20, out: 0x2608edb8
22666 lwu :: offset: 0x24, out: 0x22c9f00f
[all …]
Dload_store.stdout.exp-BE22657 lwu :: offset: 0x0, out: 0x0
22658 lwu :: offset: 0x4, out: 0x0
22659 lwu :: offset: 0x8, out: 0x9823b6e
22660 lwu :: offset: 0xc, out: 0xd4326d9
22661 lwu :: offset: 0x10, out: 0x130476dc
22662 lwu :: offset: 0x14, out: 0x17c56b6b
22663 lwu :: offset: 0x18, out: 0x1a864db2
22664 lwu :: offset: 0x1c, out: 0x1e475005
22665 lwu :: offset: 0x20, out: 0x2608edb8
22666 lwu :: offset: 0x24, out: 0x22c9f00f
[all …]
/external/llvm/test/MC/Mips/mips2/
Dinvalid-mips4-wrong-error.s12 … lwu $s3,-24086($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
Dinvalid-mips3-wrong-error.s14 … lwu $s3,-24086($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
/external/llvm/test/MC/Mips/mips1/
Dinvalid-mips3-wrong-error.s16 … lwu $s3,-24086($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
Dinvalid-mips4-wrong-error.s18 … lwu $s3,-24086($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
/external/llvm/test/CodeGen/Mips/cconv/
Dreturn-struct.ll117 ; N32-LE-DAG: lwu [[R2:\$[0-9]+]], %lo(struct_3xi16)([[PTR_HI]])
131 ; N64-LE-DAG: lwu [[R2:\$[0-9]+]], 0([[PTR]])
/external/llvm/test/MC/Disassembler/Mips/mips64/
Dvalid-mips64-el.txt139 0xea 0xa1 0x73 0x9c # CHECK: lwu $19, -24086($3)
240 0x2e 0xf9 0x63 0x9c # CHECK: lwu $3, -1746($3)
Dvalid-mips64.txt402 0x9c 0x63 0xf9 0x2e # CHECK: lwu $3, -1746($3)
403 0x9c 0x73 0xa1 0xea # CHECK: lwu $19, -24086($3)
/external/llvm/test/MC/Disassembler/Mips/mips64r2/
Dvalid-mips64r2-el.txt162 0xea 0xa1 0x73 0x9c # CHECK: lwu $19, -24086($3)
261 0x2e 0xf9 0x63 0x9c # CHECK: lwu $3, -1746($3)
/external/llvm/test/MC/Mips/mips3/
Dvalid.s138 lwu $s3,-24086($v1)
/external/v8/src/regexp/mips64/
Dregexp-macro-assembler-mips64.cc1023 __ lwu(a0, MemOperand(code_pointer(), cp_offset)); in PushBacktrack() local
1026 __ lwu(a0, MemOperand(a0, 0)); in PushBacktrack() local
/external/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid.txt102 0x60 0x44 0xe0 0x08 # CHECK: lwu $2, 8($4)
Dvalid-el.txt102 0x44 0x60 0x08 0xe0 # CHECK: lwu $2, 8($4)
/external/llvm/test/MC/Mips/mips5/
Dvalid.s144 lwu $s3,-24086($v1)
/external/llvm/test/MC/Mips/mips4/
Dvalid.s143 lwu $s3,-24086($v1)
/external/llvm/test/MC/Mips/mips64/
Dvalid.s151 lwu $s3,-24086($v1)
/external/llvm/test/MC/Mips/mips64r2/
Dvalid.s167 lwu $s3,-24086($v1)
/external/llvm/test/MC/Mips/mips64r5/
Dvalid.s168 lwu $s3,-24086($v1)
/external/llvm/test/MC/Mips/mips64r3/
Dvalid.s167 lwu $s3,-24086($v1)
/external/llvm/test/MC/Disassembler/Mips/mips64r5/
Dvalid-mips64r5.txt438 0x9c 0x63 0xf9 0x2e # CHECK: lwu $3, -1746($3)
439 0x9c 0x73 0xa1 0xea # CHECK: lwu $19, -24086($3)

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