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Searched refs:psllw (Results 1 – 25 of 75) sorted by relevance

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/external/libvpx/libvpx/vpx_dsp/x86/
Dfwd_txfm_ssse3_x86_64.asm152 psllw m0, 2
153 psllw m1, 2
154 psllw m2, 2
155 psllw m3, 2
156 psllw m4, 2
157 psllw m5, 2
158 psllw m6, 2
159 psllw m7, 2
Dhighbd_intrapred_sse2.asm277 psllw m3, m4
319 psllw m3, m4
365 psllw m7, m8
421 psllw m10, m11
/external/llvm/test/CodeGen/X86/
Dvector-shift-shl-128.ll141 ; SSE2-NEXT: psllw $12, %xmm1
146 ; SSE2-NEXT: psllw $8, %xmm0
154 ; SSE2-NEXT: psllw $4, %xmm0
162 ; SSE2-NEXT: psllw $2, %xmm0
169 ; SSE2-NEXT: psllw $1, %xmm0
178 ; SSE41-NEXT: psllw $12, %xmm0
179 ; SSE41-NEXT: psllw $4, %xmm1
184 ; SSE41-NEXT: psllw $8, %xmm4
188 ; SSE41-NEXT: psllw $4, %xmm1
192 ; SSE41-NEXT: psllw $2, %xmm1
[all …]
D2011-12-15-vec_shift.ll9 ; CHECK-W-SSE4: psllw $4, [[REG1:%xmm.]]
11 ; CHECK-W-SSE4: psllw $2
14 ; CHECK-WO-SSE4: psllw $5, [[REG1:%xmm.]]
Dvector-rotate-128.ll261 ; SSE2-NEXT: psllw $12, %xmm1
265 ; SSE2-NEXT: psllw $8, %xmm4
274 ; SSE2-NEXT: psllw $4, %xmm2
282 ; SSE2-NEXT: psllw $2, %xmm2
289 ; SSE2-NEXT: psllw $1, %xmm2
291 ; SSE2-NEXT: psllw $12, %xmm3
332 ; SSE41-NEXT: psllw $12, %xmm0
333 ; SSE41-NEXT: psllw $4, %xmm1
338 ; SSE41-NEXT: psllw $8, %xmm6
343 ; SSE41-NEXT: psllw $4, %xmm1
[all …]
Dvshift-1.ll54 ; CHECK: psllw
66 ; CHECK-NEXT: psllw
Dvshift-4.ll66 ; CHECK: psllw
77 ; CHECK: psllw
Dmachine-cp.ll68 ; CHECK: psllw $7,
69 ; CHECK: psllw $7, [[SRC1:%xmm[0-9]+]]
Dvector-shift-lshr-128.ll184 ; SSE2-NEXT: psllw $12, %xmm1
221 ; SSE41-NEXT: psllw $12, %xmm0
222 ; SSE41-NEXT: psllw $4, %xmm1
284 ; X32-SSE-NEXT: psllw $12, %xmm1
323 ; SSE2-NEXT: psllw $5, %xmm1
355 ; SSE41-NEXT: psllw $5, %xmm1
401 ; X32-SSE-NEXT: psllw $5, %xmm1
552 ; SSE2-NEXT: psllw $5, %xmm2
586 ; SSE41-NEXT: psllw $5, %xmm1
665 ; X32-SSE-NEXT: psllw $5, %xmm2
[all …]
Dx86-shifts.ll70 ; CHECK: psllw
166 ; CHECK: psllw $3
Dvec_shift.ll1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psllw
Dvector-tzcnt-128.ll486 ; SSE2-NEXT: psllw $8, %xmm0
512 ; SSE3-NEXT: psllw $8, %xmm0
534 ; SSSE3-NEXT: psllw $8, %xmm0
556 ; SSE41-NEXT: psllw $8, %xmm0
605 ; SSE2-NEXT: psllw $8, %xmm0
631 ; SSE3-NEXT: psllw $8, %xmm0
653 ; SSSE3-NEXT: psllw $8, %xmm0
675 ; SSE41-NEXT: psllw $8, %xmm0
Dvector-shift-ashr-128.ll210 ; SSE2-NEXT: psllw $12, %xmm1
247 ; SSE41-NEXT: psllw $12, %xmm0
248 ; SSE41-NEXT: psllw $4, %xmm1
310 ; X32-SSE-NEXT: psllw $12, %xmm1
350 ; SSE2-NEXT: psllw $5, %xmm1
408 ; SSE41-NEXT: psllw $5, %xmm1
479 ; X32-SSE-NEXT: psllw $5, %xmm1
680 ; SSE2-NEXT: psllw $5, %xmm3
740 ; SSE41-NEXT: psllw $5, %xmm1
855 ; X32-SSE-NEXT: psllw $5, %xmm3
[all …]
Dvector-popcnt-128.ll237 ; SSE2-NEXT: psllw $8, %xmm0
259 ; SSE3-NEXT: psllw $8, %xmm0
277 ; SSSE3-NEXT: psllw $8, %xmm0
295 ; SSE41-NEXT: psllw $8, %xmm0
/external/libvpx/libvpx/vp9/encoder/x86/
Dvp9_dct_mmx.asm63 psllw m0, 2
64 psllw m1, 2
65 psllw m2, 2
66 psllw m3, 2
/external/llvm/test/Analysis/CostModel/X86/
Dtestshiftshl.ll34 ; SSE2-CODEGEN: psllw
46 ; SSE2-CODEGEN: psllw
58 ; SSE2-CODEGEN: psllw
214 ; SSE2-CODEGEN: psllw
226 ; SSE2-CODEGEN: psllw
238 ; SSE2-CODEGEN: psllw
276 ; SSE2-CODEGEN: psllw $3
290 ; SSE2-CODEGEN: psllw $3
306 ; SSE2-CODEGEN: psllw $3
490 ; SSE2-CODEGEN: psllw $3
[all …]
/external/libvpx/libvpx/vp8/encoder/x86/
Ddct_mmx.asm73 psllw mm5, 3
74 psllw mm4, 3
76 psllw mm0, 3
77 psllw mm1, 3
Ddct_sse2.asm90 psllw xmm0, 3 ;b1 <<= 3 a1 <<= 3
91 psllw xmm3, 3 ;c1 <<= 3 d1 <<= 3
225 psllw xmm5, 3
226 psllw xmm4, 3
228 psllw xmm0, 3
229 psllw xmm1, 3
Dfwalsh_sse2.asm48 psllw xmm0, 2 ; d1 a1
49 psllw xmm2, 2 ; c1 b1
/external/valgrind/VEX/test/
Dmmxtest.c377 #define psllw_m2r(var, reg) mmx_m2r(psllw, var, reg)
378 #define psllw_r2r(regs, regd) mmx_r2r(psllw, regs, regd)
379 #define psllw(vars, vard) mmx_m2m(psllw, vars, vard) macro
586 do_test("psllw", psllw(ma,mb)); in main()
/external/valgrind/none/tests/x86/
Dinsn_mmx.def58 psllw imm8[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
59 psllw mm.uq[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
60 psllw m64.uq[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
/external/valgrind/none/tests/amd64/
Dinsn_mmx.def78 psllw imm8[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
79 psllw mm.uq[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
80 psllw m64.uq[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
/external/llvm/test/MC/X86/
Dx86-32-coverage.s4181 psllw 0xdeadbeef(%ebx,%ecx,8),%mm3
4185 psllw 0x45,%mm3
4189 psllw 0x7eed,%mm3
4193 psllw 0xbabecafe,%mm3
4197 psllw 0x12345678,%mm3
4201 psllw %mm3,%mm3
4205 psllw 0xdeadbeef(%ebx,%ecx,8),%xmm5
4209 psllw 0x45,%xmm5
4213 psllw 0x7eed,%xmm5
4217 psllw 0xbabecafe,%xmm5
[all …]
/external/valgrind/memcheck/tests/x86/
Dsse2_memory.stdout.exp781 r psllw 8e0e9bb3f2546f31d5c5643f0e28ad21 1b587a3925d8704c683d7b9bf97d09e4 00000000000000000000…
782 r psllw 73cd7d7ec56df6ca559152e2d12e901b 98b7f4943c2e00f2680cc5032b189c35 00000000000000000000…
783 r psllw 09d9ef0f63e03799eec3485a93854f98 f00f050c5ec2271f5cde4c074dd718c8 00000000000000000000…
784 r psllw edd4220db0f9e92f4ece069e49463376 dea2fde8917ebe000fc4f03f7574e71b 00000000000000000000…
785 r psllw 1a41a8fdf0e125f88105ad86466ee373 80928c4e382efca5aeb0f3221789cf8d 00000000000000000000…
786 m psllw af24d9a0c3a5c849d623cfd1d38bf1af ee827047c7a36543f39abdc641d46a2f 00000000000000000000…
787 m psllw ad3e89c64dc0d0d45b61f2d8bcdfe0f9 25daca313c2a7f3f709f16f64c362e27 00000000000000000000…
788 m psllw 1e092882fa5048de6b59abf4ae8e917d db6c69e1b140adfa2607fa8cdd2cf9ba 00000000000000000000…
789 m psllw bdc60619d0410695d31ddabcbd536bba 8e385b5eeb908863a0a408dfc831f327 00000000000000000000…
790 m psllw a899d3b3335e4507bfa1bfa65dca380e 1824118f0fa30749cc2a422542a1a48b 00000000000000000000…
/external/libyuv/files/source/
Drow_win.cc334 psllw xmm3, 11 in RGB565ToARGBRow_SSE2()
336 psllw xmm4, 10 in RGB565ToARGBRow_SSE2()
339 psllw xmm7, 8 in RGB565ToARGBRow_SSE2()
353 psllw xmm2, 11 // B in upper 5 bits in RGB565ToARGBRow_SSE2()
356 psllw xmm1, 8 in RGB565ToARGBRow_SSE2()
385 psllw xmm3, 11 in ARGB1555ToARGBRow_SSE2()
389 psllw xmm7, 8 in ARGB1555ToARGBRow_SSE2()
402 psllw xmm1, 1 // R in upper 5 bits in ARGB1555ToARGBRow_SSE2()
403 psllw xmm2, 11 // B in upper 5 bits in ARGB1555ToARGBRow_SSE2()
407 psllw xmm1, 8 in ARGB1555ToARGBRow_SSE2()
[all …]

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