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/external/llvm/test/MC/Disassembler/Hexagon/
Dnv_j.txt6 # CHECK: r17 = r17
7 # CHECK-NEXT: if (cmp.eq(r17.new, r21)) jump:nt
9 # CHECK: r17 = r17
10 # CHECK-NEXT: if (cmp.eq(r17.new, r21)) jump:t
12 # CHECK: r17 = r17
13 # CHECK-NEXT: if (!cmp.eq(r17.new, r21)) jump:nt
15 # CHECK: r17 = r17
16 # CHECK-NEXT: if (!cmp.eq(r17.new, r21)) jump:t
18 # CHECK: r17 = r17
19 # CHECK-NEXT: if (cmp.gt(r17.new, r21)) jump:nt
[all …]
Dxtype_shift.txt6 # CHECK: r17:16 = asr(r21:20, #31)
8 # CHECK: r17:16 = lsr(r21:20, #31)
10 # CHECK: r17:16 = asl(r21:20, #31)
12 # CHECK: r17 = asr(r21, #31)
14 # CHECK: r17 = lsr(r21, #31)
16 # CHECK: r17 = asl(r21, #31)
20 # CHECK: r17:16 -= asr(r21:20, #31)
22 # CHECK: r17:16 -= lsr(r21:20, #31)
24 # CHECK: r17:16 -= asl(r21:20, #31)
26 # CHECK: r17:16 += asr(r21:20, #31)
[all …]
Dxtype_alu.txt6 # CHECK: r17:16 = abs(r21:20)
8 # CHECK: r17 = abs(r21)
10 # CHECK: r17 = abs(r21):sat
14 # CHECK: r17 = add(r21, add(r31, #23))
16 # CHECK: r17 = add(r21, sub(#23, r31))
18 # CHECK: r17 += add(r21, #23)
20 # CHECK: r17 -= add(r21, #23)
22 # CHECK: r17 += add(r21, r31)
24 # CHECK: r17 -= add(r21, r31)
28 # CHECK: r17:16 = add(r21:20, r31:30)
[all …]
Dxtype_mpy.txt6 # CHECK: r17 = add(#21, mpyi(r21, r31))
8 # CHECK: r17 = add(#21, mpyi(r21, #31))
10 # CHECK: r17 = add(r21, mpyi(#84, r31))
12 # CHECK: r17 = add(r21, mpyi(r21, #31))
14 # CHECK: r17 = add(r21, mpyi(r17, r31))
16 # CHECK: r17 =+ mpyi(r21, #31)
18 # CHECK: r17 =- mpyi(r21, #31)
20 # CHECK: r17 += mpyi(r21, #31)
22 # CHECK: r17 -= mpyi(r21, #31)
24 # CHECK: r17 = mpyi(r21, r31)
[all …]
Dld.txt6 # CHECK: r17:16 = memd(r21 + r31<<#3)
8 # CHECK: r17:16 = memd(#168)
10 # CHECK: r17:16 = memd(##168)
12 # CHECK: r17:16 = memd(r21 + #48)
14 # CHECK: r17:16 = memd(r21 ++ #40:circ(m1))
16 # CHECK: r17:16 = memd(r21 ++ I:circ(m1))
18 # CHECK: r17:16 = memd(r21 = ##31)
20 # CHECK: r17:16 = memd(r21++#40)
22 # CHECK: r17:16 = memd(r21++m1)
24 # CHECK: r17:16 = memd(r21 ++ m1:brev)
[all …]
Dxtype_bit.txt6 # CHECK: r17 = clb(r21:20)
8 # CHECK: r17 = cl0(r21:20)
10 # CHECK: r17 = cl1(r21:20)
12 # CHECK: r17 = normamt(r21:20)
14 # CHECK: r17 = add(clb(r21:20), #23)
16 # CHECK: r17 = add(clb(r21), #23)
18 # CHECK: r17 = clb(r21)
20 # CHECK: r17 = cl0(r21)
22 # CHECK: r17 = cl1(r21)
24 # CHECK: r17 = normamt(r21)
[all …]
Dxtype_fp.txt6 # CHECK: r17 = sfadd(r21, r31)
10 # CHECK: p3 = sfclass(r17, #21)
12 # CHECK: p3 = dfclass(r17:16, #21)
16 # CHECK: p3 = sfcmp.ge(r17, r21)
18 # CHECK: p3 = sfcmp.uo(r17, r21)
20 # CHECK: p3 = sfcmp.eq(r17, r21)
22 # CHECK: p3 = sfcmp.gt(r17, r21)
24 # CHECK: p3 = dfcmp.eq(r17:16, r21:20)
26 # CHECK: p3 = dfcmp.gt(r17:16, r21:20)
28 # CHECK: p3 = dfcmp.ge(r17:16, r21:20)
[all …]
Dxtype_complex.txt6 # CHECK: r17:16 = vxaddsubh(r21:20, r31:30):sat
8 # CHECK: r17:16 = vxsubaddh(r21:20, r31:30):sat
10 # CHECK: r17:16 = vxaddsubh(r21:20, r31:30):rnd:>>1:sat
12 # CHECK: r17:16 = vxsubaddh(r21:20, r31:30):rnd:>>1:sat
16 # CHECK: r17:16 = vxaddsubw(r21:20, r31:30):sat
18 # CHECK: r17:16 = vxsubaddw(r21:20, r31:30):sat
22 # CHECK: r17:16 = cmpy(r21, r31):sat
24 # CHECK: r17:16 = cmpy(r21, r31):<<1:sat
26 # CHECK: r17:16 = cmpy(r21, r31*):sat
28 # CHECK: r17:16 = cmpy(r21, r31*):<<1:sat
[all …]
Dxtype_perm.txt6 # CHECK: r17:16 = decbin(r21:20, r31:30)
10 # CHECK: r17 = sat(r21:20)
12 # CHECK: r17 = sath(r21)
14 # CHECK: r17 = satuh(r21)
16 # CHECK: r17 = satub(r21)
18 # CHECK: r17 = satb(r21)
22 # CHECK: r17 = swiz(r21)
26 # CHECK: r17:16 = valignb(r21:20, r31:30, p3)
28 # CHECK: r17:16 = vspliceb(r21:20, r31:30, p3)
32 # CHECK: r17 = vrndwh(r21:20)
[all …]
Dj.txt14 # CHECK: p0 = cmp.eq(r17,#-1); if (p0.new) jump:nt
16 # CHECK: p0 = cmp.gt(r17,#-1); if (p0.new) jump:nt
18 # CHECK: p0 = tstbit(r17, #0); if (p0.new) jump:nt
20 # CHECK: p0 = cmp.eq(r17,#-1); if (p0.new) jump:t
22 # CHECK: p0 = cmp.gt(r17,#-1); if (p0.new) jump:t
24 # CHECK: p0 = tstbit(r17, #0); if (p0.new) jump:t
26 # CHECK: p0 = cmp.eq(r17,#-1); if (!p0.new) jump:nt
28 # CHECK: p0 = cmp.gt(r17,#-1); if (!p0.new) jump:nt
30 # CHECK: p0 = tstbit(r17, #0); if (!p0.new) jump:nt
32 # CHECK: p0 = cmp.eq(r17,#-1); if (!p0.new) jump:t
[all …]
Dalu32_alu.txt6 # CHECK: r17 = add(r21, #31)
8 # CHECK: r17 = add(r21, r31)
10 # CHECK: r17 = add(r21, r31):sat
14 # CHECK: r17 = and(r21, #31)
16 # CHECK: r17 = or(r21, #31)
18 # CHECK: r17 = and(r21, r31)
20 # CHECK: r17 = or(r21, r31)
22 # CHECK: r17 = xor(r21, r31)
24 # CHECK: r17 = and(r21, ~r31)
26 # CHECK: r17 = or(r21, ~r31)
[all …]
Dmemop.txt6 # CHECK: memb(r17+#51) += r21
8 # CHECK: memb(r17+#51) -= r21
10 # CHECK: memb(r17+#51) &= r21
12 # CHECK: memb(r17+#51) |= r21
14 # CHECK: memb(r17+#51) += #21
16 # CHECK: memb(r17+#51) -= #21
18 # CHECK: memb(r17+#51) = clrbit(#21)
20 # CHECK: memb(r17+#51) = setbit(#21)
24 # CHECK: memh(r17+#102) += r21
26 # CHECK: memh(r17+#102) -= r21
[all …]
Dst.txt6 # CHECK: memd(r17 + r21<<#3) = r31:30
12 # CHECK: memd(r17+#168) = r21:20
14 # CHECK: memd(r17 ++ I:circ(m1)) = r21:20
16 # CHECK: memd(r17 ++ #40:circ(m1)) = r21:20
18 # CHECK: memd(r17++#40) = r21:20
20 # CHECK: memd(r17<<#3 + ##21) = r31:30
22 # CHECK: memd(r17++m1) = r21:20
24 # CHECK: memd(r17 ++ m1:brev) = r21:20
28 # CHECK: if (p3) memd(r17+r21<<#3) = r31:30
30 # CHECK: if (!p3) memd(r17+r21<<#3) = r31:30
[all …]
Dalu32_pred.txt6 # CHECK: if (p3) r17 = add(r21, #31)
9 # CHECK-NEXT: if (p3.new) r17 = add(r21, #31)
11 # CHECK: if (!p3) r17 = add(r21, #31)
14 # CHECK-NEXT: if (!p3.new) r17 = add(r21, #31)
16 # CHECK: if (p3) r17 = add(r21, r31)
19 # CHECK-NEXT: if (p3.new) r17 = add(r21, r31)
21 # CHECK: if (!p3) r17 = add(r21, r31)
24 # CHECK-NEXT: if (!p3.new) r17 = add(r21, r31)
28 # CHECK: if (p3) r17 = aslh(r21)
31 # CHECK-NEXT: if (p3.new) r17 = aslh(r21)
[all …]
Dalu32_perm.txt6 # CHECK: r17 = combine(r31.h, r21.h)
8 # CHECK: r17 = combine(r31.h, r21.l)
10 # CHECK: r17 = combine(r31.l, r21.h)
12 # CHECK: r17 = combine(r31.l, r21.l)
14 # CHECK: r17:16 = combine(#21, #31)
16 # CHECK: r17:16 = combine(#21, r31)
18 # CHECK: r17:16 = combine(r21, #31)
20 # CHECK: r17:16 = combine(r21, r31)
24 # CHECK: r17 = mux(p3, r21, #31)
26 # CHECK: r17 = mux(p3, #21, r31)
[all …]
Dnv_st.txt7 # CHECK-NEXT: memb(r17 + r21<<#3) = r31.new
13 # CHECK-NEXT: memb(r17+#21) = r31.new
16 # CHECK-NEXT: memb(r17 ++ I:circ(m1)) = r31.new
19 # CHECK-NEXT: memb(r17 ++ #5:circ(m1)) = r31.new
22 # CHECK-NEXT: memb(r17++#5) = r31.new
25 # CHECK-NEXT: memb(r17++m1) = r31.new
28 # CHECK-NEXT: memb(r17 ++ m1:brev) = r31.new
33 # CHECK-NEXT: if (p3) memb(r17+r21<<#3) = r31.new
36 # CHECK-NEXT: if (!p3) memb(r17+r21<<#3) = r31.new
40 # CHECK-NEXT: if (p3.new) memb(r17+r21<<#3) = r31.new
[all …]
Dxtype_pred.txt6 # CHECK: p3 = boundscheck(r17:16, r21:20):raw:lo
8 # CHECK: p3 = boundscheck(r17:16, r21:20):raw:hi
12 # CHECK: p3 = cmpb.gt(r17, r21)
14 # CHECK: p3 = cmpb.eq(r17, r21)
16 # CHECK: p3 = cmpb.gtu(r17, r21)
18 # CHECK: p3 = cmpb.eq(r17, #21)
20 # CHECK: p3 = cmpb.gt(r17, #21)
22 # CHECK: p3 = cmpb.gtu(r17, #21)
26 # CHECK: p3 = cmph.eq(r17, r21)
28 # CHECK: p3 = cmph.gt(r17, r21)
[all …]
Dsystem_user.txt6 # CHECK: r17 = memw_locked(r21)
8 # CHECK: r17:16 = memd_locked(r21)
12 # CHECK: memw_locked(r17, p3) = r21
14 # CHECK: memd_locked(r17, p3) = r21:20
22 # CHECK: dcfetch(r17 + #168)
26 # CHECK: trace(r17)
/external/libunwind/src/ia64/
DGinstall_cursor.S68 ld8 r17 = [r2], 2*LOC_SIZE // r17 = loc[IA64_REG_FR17]
75 and r17 = -4, r17
79 ldf.fill f17 = [r17] // f17 restored (don't touch no more)
165 ld8 r17= [r3], (B4_LOC_OFF - B2_LOC_OFF) // r17 = b2_loc
176 and r17 = -4, r17
180 ld8 r17 = [r17] // r17 = *b2_loc
208 mov b2 = r17 // b2 restored (don't touch no more)
284 ld8 r17 = [r9] // r17 restored (don't touch no more)
Dsetjmp.S40 adds r17 = JB_BSP*8, r32
44 st8 [r17] = r2 // jmp_buf[JB_BSP] = bsp
/external/libunwind/tests/
Dia64-test-rbs-asm.S76 mov r17 = ar.bspstore; \
83 st8 [r3] = r17, (SAVED_RNAT_OFF - SAVED_BSPSTORE_OFF); \
99 ld8 r17 = [r3], (SAVED_PFS_OFF-SAVED_RP_OFF);; /* saved rp */ \
104 mov rp = r17; \
181 (p6) ld8 r17 = [in2] // get address of function descriptor
186 (p6) ld8 r16 = [r17], 8 // load entry point
190 (p6) ld8 r1 = [r17] // load gp
Dia64-test-stack-asm.S70 mov r17 = ar.bspstore
77 st8 [r3] = r17, (SAVED_RNAT_OFF - SAVED_BSPSTORE_OFF)
105 ld8 r17 = [r3], (SAVED_PFS_OFF-SAVED_RP_OFF);; // saved rp
111 mov rp = r17
/external/valgrind/none/tests/ppc64/
Dtest_isa_2_06_part2.c52 register HWord_t r17 __asm__ ("r17");
957 __asm__ __volatile__ ("bpermd %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_bpermd()
959 (unsigned long long)r15, (unsigned long long)r17); in test_bpermd()
988 __asm__ __volatile__ ("divde %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divde()
993 __asm__ __volatile__ ("divdeo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divde()
998 __asm__ __volatile__ ("divde. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divde()
1003 __asm__ __volatile__ ("divdeo. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divde()
1024 __asm__ __volatile__ ("divweu %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divweu()
1029 __asm__ __volatile__ ("divweuo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divweu()
1034 __asm__ __volatile__ ("divweu. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divweu()
[all …]
/external/valgrind/none/tests/ppc32/
Dtest_isa_2_06_part2.c52 register HWord_t r17 __asm__ ("r17");
957 __asm__ __volatile__ ("bpermd %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_bpermd()
959 (unsigned long long)r15, (unsigned long long)r17); in test_bpermd()
988 __asm__ __volatile__ ("divde %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divde()
993 __asm__ __volatile__ ("divdeo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divde()
998 __asm__ __volatile__ ("divde. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divde()
1003 __asm__ __volatile__ ("divdeo. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divde()
1024 __asm__ __volatile__ ("divweu %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divweu()
1029 __asm__ __volatile__ ("divweuo %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divweu()
1034 __asm__ __volatile__ ("divweu. %0, %1, %2" : "=r" (r17) : "r" (r14),"r" (r15)); in test_divweu()
[all …]
/external/clang/test/CXX/except/except.spec/
Dp3.cpp73 extern void (*r17)(); // expected-note {{previous declaration}}
74 extern void (*r17)() noexcept(false); // expected-error {{does not match}}

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