| /external/boringssl/linux-aarch64/crypto/sha/ |
| D | sha512-armv8.S | 37 ror x16,x24,#14
39 eor x6,x24,x24,ror#23
45 eor x16,x16,x6,ror#18 // Sigma1(e)
46 ror x6,x20,#28
48 eor x17,x20,x20,ror#5
53 eor x17,x6,x17,ror#34 // Sigma0(a)
62 ror x16,x23,#14
64 eor x7,x23,x23,ror#23
70 eor x16,x16,x7,ror#18 // Sigma1(e)
71 ror x7,x27,#28
[all …]
|
| D | sha256-armv8.S | 43 ror w16,w24,#6
45 eor w6,w24,w24,ror#14
51 eor w16,w16,w6,ror#11 // Sigma1(e)
52 ror w6,w20,#2
54 eor w17,w20,w20,ror#9
59 eor w17,w6,w17,ror#13 // Sigma0(a)
68 ror w16,w23,#6
70 eor w7,w23,w23,ror#14
76 eor w16,w16,w7,ror#11 // Sigma1(e)
77 ror w7,w27,#2
[all …]
|
| D | sha1-armv8.S | 36 ror x3,x3,#32
46 ror w27,w20,#27
50 ror w21,w21,#2
54 ror x5,x5,#32
60 ror w27,w24,#27
64 ror w20,w20,#2
71 ror w27,w23,#27
75 ror w24,w24,#2
79 ror x7,x7,#32
85 ror w27,w22,#27
[all …]
|
| /external/boringssl/linux-arm/crypto/sha/ |
| D | sha1-armv4-large.S | 31 mov r5,r5,ror#30
32 mov r6,r6,ror#30
33 mov r7,r7,ror#30 @ [6]
39 add r7,r8,r7,ror#2 @ E+=K_00_19
44 add r7,r7,r3,ror#27 @ E+=ROR(A,27)
48 add r7,r8,r7,ror#2 @ E+=K_00_19
50 add r7,r7,r3,ror#27 @ E+=ROR(A,27)
55 and r10,r4,r10,ror#2
57 eor r10,r10,r6,ror#2 @ F_00_19(B,C,D)
64 add r6,r8,r6,ror#2 @ E+=K_00_19
[all …]
|
| /external/boringssl/win-x86/crypto/sha/ |
| D | sha256-586.asm | 136 ror ecx,14
141 ror ecx,5
147 ror edx,6
150 ror ecx,9
156 ror ecx,11
161 ror ecx,2
178 ror ecx,11
180 ror esi,2
183 ror ecx,7
186 ror esi,17
[all …]
|
| D | sha1-586.asm | 118 ror ebx,2
130 ror eax,2
142 ror esi,2
154 ror edi,2
166 ror edx,2
178 ror ecx,2
190 ror ebx,2
202 ror eax,2
214 ror esi,2
226 ror edi,2
[all …]
|
| /external/boringssl/win-x86_64/crypto/sha/ |
| D | sha256-x86_64.asm | 69 ror r13d,14
73 ror r14d,9
80 ror r13d,5
84 ror r14d,11
93 ror r13d,6
97 ror r14d,2
110 ror r13d,14
114 ror r14d,9
121 ror r13d,5
125 ror r14d,11
[all …]
|
| D | sha512-x86_64.asm | 69 ror r13,23
73 ror r14,5
80 ror r13,4
84 ror r14,6
93 ror r13,14
97 ror r14,28
110 ror r13,23
114 ror r14,5
121 ror r13,4
125 ror r14,6
[all …]
|
| D | sha1-x86_64.asm | 1323 ror ebx,2
1339 ror eax,7
1353 ror ebp,7
1369 ror edx,7
1384 ror ecx,7
1400 ror ebx,7
1414 ror eax,7
1430 ror ebp,7
1445 ror edx,7
1461 ror ecx,7
[all …]
|
| /external/v8/test/mjsunit/asm/ |
| D | word32ror.js | 24 var ror = (function Module(stdlib, foreign, heap) { function
26 function ror(x, y) { function
31 return { ror: ror };
32 })(stdlib, foreign, heap).ror;
34 assertEquals(10, ror(10, 0));
35 assertEquals(-0x80000000, ror(1, 1));
36 assertEquals(0x40000000, ror(1, 2));
37 assertEquals(2, ror(1, 31));
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-logical-encoding.s | 58 and w1, w2, w3, ror #2
59 and x1, x2, x3, ror #2
69 ; CHECK: and w1, w2, w3, ror #2 ; encoding: [0x41,0x08,0xc3,0x0a]
70 ; CHECK: and x1, x2, x3, ror #2 ; encoding: [0x41,0x08,0xc3,0x8a]
80 ands w1, w2, w3, ror #2
81 ands x1, x2, x3, ror #2
91 ; CHECK: ands w1, w2, w3, ror #2 ; encoding: [0x41,0x08,0xc3,0x6a]
92 ; CHECK: ands x1, x2, x3, ror #2 ; encoding: [0x41,0x08,0xc3,0xea]
102 bic w1, w2, w3, ror #3
103 bic x1, x2, x3, ror #3
[all …]
|
| /external/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-uxtb.ll | 17 ; ARMv7A: uxtb16 r0, r0, ror #8
29 ; ARMv7A: uxtb16 r0, r0, ror #8
41 ; ARMv7A: uxtb16 r0, r0, ror #8
53 ; ARMv7A: uxtb16 r0, r0, ror #8
65 ; ARMv7A: uxtb16 r0, r0, ror #16
69 ; ARMv7M: and.w r0, r1, r0, ror #16
80 ; ARMv7A: uxtb16 r0, r0, ror #16
84 ; ARMv7M: and.w r0, r1, r0, ror #16
95 ; ARMv7A: uxtb16 r0, r0, ror #24
99 ; ARMv7M: and.w r0, r1, r0, ror #24
[all …]
|
| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 78 adc r4, r5, r6, ror #1
79 adc r4, r5, r6, ror #31
85 adc r6, r7, r8, ror r9
98 adc r4, r5, ror #1
99 adc r4, r5, ror #31
104 adc r6, r7, ror r9
117 @ CHECK: adc r4, r5, r6, ror #1 @ encoding: [0xe6,0x40,0xa5,0xe0]
118 @ CHECK: adc r4, r5, r6, ror #31 @ encoding: [0xe6,0x4f,0xa5,0xe0]
123 @ CHECK: adc r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0xa7,0xe0]
135 @ CHECK: adc r4, r4, r5, ror #1 @ encoding: [0xe5,0x40,0xa4,0xe0]
[all …]
|
| D | arm-shift-encoding.s | 11 ldr r0, [r0, r0, ror #16]
21 @ CHECK: ldr r0, [r0, r0, ror #16] @ encoding: [0x60,0x08,0x90,0xe7]
31 pld [r0, r0, ror #16]
41 @ CHECK: [r0, r0, ror #16] @ encoding: [0x60,0xf8,0xd0,0xf7]
51 str r0, [r0, r0, ror #16]
61 @ CHECK: str r0, [r0, r0, ror #16] @ encoding: [0x60,0x08,0x80,0xe7]
69 ldr r3, [r4], r5, ror #0
89 adc r8, r1, r0, ror #16
99 @ CHECK: adc r8, r1, r0, ror #16 @ encoding: [0x60,0x88,0xa1,0xe0]
109 cmp r8, r1, ror #16
[all …]
|
| D | basic-thumb2-instructions.s | 48 adc r0, r1, r3, ror #4
57 @ CHECK: adc.w r0, r1, r3, ror #4 @ encoding: [0x41,0xeb,0x33,0x10]
122 add.w r4, r8, r1, ror #12
143 @ CHECK: add.w r4, r8, r1, ror #12 @ encoding: [0x08,0xeb,0x31,0x34]
249 and.w r9, r12, r1, ror #17
255 @ CHECK: and.w r9, r12, r1, ror #17 @ encoding: [0x0c,0xea,0x71,0x49]
355 bic r5, r6, r8, ror #1
364 bic r12, r6, ror #29
374 @ CHECK: bic.w r5, r6, r8, ror #1 @ encoding: [0x26,0xea,0x78,0x05]
382 @ CHECK: bic.w r12, r12, r6, ror #29 @ encoding: [0x2c,0xea,0x76,0x7c]
[all …]
|
| D | thumb2-dsp-diag.s | 8 sxtb16 r0, r0, ror #8
18 @ CHECK-7EM: sxtb16 r0, r0, ror #8 @ encoding: [0x2f,0xfa,0x90,0xf0]
24 uxtb16 r0, r0, ror #8
34 @ CHECK-7EM: uxtb16 r0, r0, ror #8 @ encoding: [0x3f,0xfa,0x90,0xf0]
|
| D | thumb-shift-encoding.s | 15 sbc.w r8, r1, r0, ror #16
25 @ CHECK: sbc.w r8, r1, r0, ror #16 @ encoding: [0x61,0xeb,0x30,0x48]
35 and.w r8, r1, r0, ror #16
45 @ CHECK: and.w r8, r1, r0, ror #16 @ encoding: [0x01,0xea,0x30,0x48]
|
| /external/llvm/test/MC/Mips/ |
| D | rotations32.s | 50 ror $4,$5
56 ror $4,$5,$6
62 ror $4,0
65 ror $4,$5,0
68 ror $4,1
73 ror $4,$5,1
78 ror $4,2
83 ror $4,$5,2
|
| D | rotations64.s | 50 ror $4,$5
56 ror $4,$5,$6
62 ror $4,0
65 ror $4,$5,0
68 ror $4,1
73 ror $4,$5,1
78 ror $4,2
83 ror $4,$5,2
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-logical.txt | 68 # CHECK: and w1, w2, w3, ror #2
69 # CHECK: and x1, x2, x3, ror #2
90 # CHECK: ands w1, w2, w3, ror #2
91 # CHECK: ands x1, x2, x3, ror #2
112 # CHECK: bic w1, w2, w3, ror #3
113 # CHECK: bic x1, x2, x3, ror #3
134 # CHECK: bics w1, w2, w3, ror #3
135 # CHECK: bics x1, x2, x3, ror #3
156 # CHECK: eon w1, w2, w3, ror #4
157 # CHECK: eon x1, x2, x3, ror #4
[all …]
|
| /external/compiler-rt/lib/builtins/arm/ |
| D | bswapdi2.S | 32 eor r2, r0, r0, ror #16
35 eor r2, r2, r0, ror #8
37 eor r0, r1, r1, ror #16
40 eor r0, r0, r1, ror #8
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 53 # CHECK: adc r4, r5, r6, ror #1
54 # CHECK: adc r4, r5, r6, ror #31
59 # CHECK: adc r6, r7, r8, ror r9
71 # CHECK: adc r4, r4, r5, ror #1
72 # CHECK: adc r4, r4, r5, ror #31
77 # CHECK: adc r6, r6, r7, ror r9
128 # CHECK: add r4, r5, r6, ror #5
132 # CHECK: add r6, r7, r8, ror r9
141 # CHECK: add r4, r4, r5, ror #5
145 # CHECK: add r6, r6, r7, ror r9
[all …]
|
| D | thumb2.txt | 33 # CHECK: adc.w r0, r1, r3, ror #4
81 # CHECK: add.w r4, r8, r1, ror #12
120 # CHECK: and.w r9, r12, r1, ror #17
215 # CHECK: bic.w r5, r6, r8, ror #1
223 # CHECK: bic.w r12, r12, r6, ror #29
309 #CHECK: cmn.w r1, r6, ror #10
329 #CHECK: cmp.w r1, r4, ror #15
437 #CHECK: eor.w r4, r5, r6, ror #5
1193 # CHECK: mvn.w r5, r6, ror #6
1226 # CHECK: orn r4, r5, r6, ror #5
[all …]
|
| /external/boringssl/src/crypto/sha/asm/ |
| D | sha256-586.pl | 111 &ror ("ecx",18-7);
113 &ror ("esi",19-17);
116 &ror ("ecx",7);
119 &ror ("esi",17);
135 &ror ("ecx",25-11);
142 &ror ("ecx",11-6);
148 &ror ($E,6); # Sigma1(e)
152 &ror ("ecx",22-13);
158 &ror ("ecx",13-2);
163 &ror ("ecx",2); # Sigma0(a)
[all …]
|
| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| D | dc_only_idct_add_v6.asm | 36 uxtab16 r4, r0, r4, ror #8 ; a1+3 | a1+1
38 uxtab16 r6, r0, r6, ror #8
51 uxtab16 r4, r0, r4, ror #8
53 uxtab16 r6, r0, r6, ror #8
|