Searched refs:si_pm4_cmd_add (Results 1 – 5 of 5) sorted by relevance
/external/mesa3d/src/gallium/drivers/radeonsi/ |
D | si_commands.c | 34 si_pm4_cmd_add(pm4, cp_coher_cntl); /* CP_COHER_CNTL */ in si_cmd_surface_sync() 35 si_pm4_cmd_add(pm4, 0xffffffff); /* CP_COHER_SIZE */ in si_cmd_surface_sync() 36 si_pm4_cmd_add(pm4, 0); /* CP_COHER_BASE */ in si_cmd_surface_sync() 37 si_pm4_cmd_add(pm4, 0x0000000A); /* POLL_INTERVAL */ in si_cmd_surface_sync()
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D | radeonsi_pm4.c | 41 void si_pm4_cmd_add(struct si_pm4_state *state, uint32_t dw) in si_pm4_cmd_add() function 80 si_pm4_cmd_add(state, reg); in si_pm4_set_reg() 84 si_pm4_cmd_add(state, val); in si_pm4_set_reg() 106 si_pm4_cmd_add(state, dw); in si_pm4_sh_data_add() 122 si_pm4_cmd_add(state, (reg - SI_SH_REG_OFFSET) >> 2); in si_pm4_sh_data_end() 124 si_pm4_cmd_add(state, offs << 2); in si_pm4_sh_data_end() 125 si_pm4_cmd_add(state, 0); in si_pm4_sh_data_end()
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D | si_state_draw.c | 477 si_pm4_cmd_add(pm4, V_028A7C_VGT_INDEX_32 | (R600_BIG_ENDIAN ? in si_state_draw() 480 si_pm4_cmd_add(pm4, V_028A7C_VGT_INDEX_16 | (R600_BIG_ENDIAN ? in si_state_draw() 486 si_pm4_cmd_add(pm4, info->instance_count); in si_state_draw() 496 si_pm4_cmd_add(pm4, (ib->buffer->width0 - ib->offset) / in si_state_draw() 498 si_pm4_cmd_add(pm4, va); in si_state_draw() 499 si_pm4_cmd_add(pm4, (va >> 32UL) & 0xFF); in si_state_draw() 500 si_pm4_cmd_add(pm4, info->count); in si_state_draw() 501 si_pm4_cmd_add(pm4, V_0287F0_DI_SRC_SEL_DMA); in si_state_draw() 505 si_pm4_cmd_add(pm4, info->count); in si_state_draw() 506 si_pm4_cmd_add(pm4, V_0287F0_DI_SRC_SEL_AUTO_INDEX | in si_state_draw()
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D | radeonsi_pm4.h | 64 void si_pm4_cmd_add(struct si_pm4_state *state, uint32_t dw);
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D | si_state.c | 2501 si_pm4_cmd_add(pm4, 0x80000000); in si_init_config() 2502 si_pm4_cmd_add(pm4, 0x80000000); in si_init_config()
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