/external/valgrind/none/tests/mips32/ |
D | mips32_dsp.c | 560 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", 0x73468000, t6, t7); in main() 568 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", 0xf973437b, t6, t7); in main() 576 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", 0x0b300286, t6, t7); in main() 584 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", 0xfabfabfa, t6, t7); in main() 592 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", 0x7b11bee7, t6, t7); in main() 600 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", -237, t6, t7); in main() 606 TESTDSPINST_RD_RT_DSPC("absq_s.w $t6, $t7", 0x73468000, t6, t7); in main() 614 TESTDSPINST_RD_RT_DSPC("absq_s.w $t6, $t7", 0xf973437b, t6, t7); in main() 622 TESTDSPINST_RD_RT_DSPC("absq_s.w $t6, $t7", 0x0b300286, t6, t7); in main() 630 TESTDSPINST_RD_RT_DSPC("absq_s.w $t6, $t7", 0xfabfabfa, t6, t7); in main() [all …]
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D | mips32_dspr2.c | 553 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t6, $t7", 0x734680bc, t6, t7); in main() 561 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t6, $t7", 0xf973437b, t6, t7); in main() 569 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t6, $t7", 0x00000286, t6, t7); in main() 577 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t6, $t7", 0xfabfabfa, t6, t7); in main() 585 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t6, $t7", 0x7b11bee7, t6, t7); in main() 599 t6, t7, t3); in main() 613 t6, t7, t3); in main() 629 t6, t7, t3); in main() 645 t6, t7, t3); in main() 661 t6, t7, t3); in main() [all …]
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D | branches.c | 260 TESTINST1(13, t7); in main() 286 TESTINST2(13, t7); in main() 312 TESTINST3(13, t7); in main() 336 TESTINST4("beq", 11, 0x256, 0x256, t5, t6, t7); in main() 337 TESTINST4("beq", 12, 0x55, 0x55, t6, t7, s0); in main() 354 TESTINST4("bne", 11, 0x256, 0x256, t5, t6, t7); in main() 355 TESTINST4("bne", 12, 0x55, 0x55, t6, t7, s0); in main() 373 TESTINST5("beqz", 12, 0x55, t6, t7); in main() 391 TESTINST5("bgez", 12, 0x55, t6, t7); in main() 409 TESTINST5("bgtz", 12, 0x55, t6, t7); in main() [all …]
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D | mips32_dsp.stdout.exp-LE | 5 absq_s.ph $t6, $t7 :: rd 0x73467fff rt 0x73468000 DSPControl 0x100000 13 absq_s.ph $t6, $t7 :: rd 0x068d437b rt 0xf973437b DSPControl 0x0 21 absq_s.ph $t6, $t7 :: rd 0x0b300286 rt 0x0b300286 DSPControl 0x0 29 absq_s.ph $t6, $t7 :: rd 0x05415406 rt 0xfabfabfa DSPControl 0x0 37 absq_s.ph $t6, $t7 :: rd 0x7b114119 rt 0x7b11bee7 DSPControl 0x0 45 absq_s.ph $t6, $t7 :: rd 0x000100ed rt 0xffffff13 DSPControl 0x0 50 absq_s.w $t6, $t7 :: rd 0x73468000 rt 0x73468000 DSPControl 0x0 58 absq_s.w $t6, $t7 :: rd 0x068cbc85 rt 0xf973437b DSPControl 0x0 66 absq_s.w $t6, $t7 :: rd 0x0b300286 rt 0x0b300286 DSPControl 0x0 74 absq_s.w $t6, $t7 :: rd 0x05405406 rt 0xfabfabfa DSPControl 0x0 [all …]
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D | mips32_dsp.stdout.exp-BE | 5 absq_s.ph $t6, $t7 :: rd 0x73467fff rt 0x73468000 DSPControl 0x100000 13 absq_s.ph $t6, $t7 :: rd 0x068d437b rt 0xf973437b DSPControl 0x0 21 absq_s.ph $t6, $t7 :: rd 0x0b300286 rt 0x0b300286 DSPControl 0x0 29 absq_s.ph $t6, $t7 :: rd 0x05415406 rt 0xfabfabfa DSPControl 0x0 37 absq_s.ph $t6, $t7 :: rd 0x7b114119 rt 0x7b11bee7 DSPControl 0x0 45 absq_s.ph $t6, $t7 :: rd 0x000100ed rt 0xffffff13 DSPControl 0x0 50 absq_s.w $t6, $t7 :: rd 0x73468000 rt 0x73468000 DSPControl 0x0 58 absq_s.w $t6, $t7 :: rd 0x068cbc85 rt 0xf973437b DSPControl 0x0 66 absq_s.w $t6, $t7 :: rd 0x0b300286 rt 0x0b300286 DSPControl 0x0 74 absq_s.w $t6, $t7 :: rd 0x05405406 rt 0xfabfabfa DSPControl 0x0 [all …]
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/external/libjpeg-turbo/simd/ |
D | jsimd_mips_dspr2.S | 69 addu t7, t4, s0 70 addu t8, t7, s0 73 lbu t7, 0(t7) 78 sb t7, -2(t5) 105 addu t7, t4, s0 106 addu t8, t7, s0 109 lbu t7, 0(t7) 114 sb t7, -2(t5) 166 lw t7, 48(sp) // t7 = num_rows 178 addiu t7, -1 // --num_rows [all …]
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/external/llvm/test/CodeGen/X86/ |
D | vec_ins_extract-1.ll | 6 define i32 @t0(i32 inreg %t7, <4 x i32> inreg %t8) nounwind { 7 %t13 = insertelement <4 x i32> %t8, i32 76, i32 %t7 11 define i32 @t1(i32 inreg %t7, <4 x i32> inreg %t8) nounwind { 13 %t9 = extractelement <4 x i32> %t13, i32 %t7 16 define <4 x i32> @t2(i32 inreg %t7, <4 x i32> inreg %t8) nounwind { 17 %t9 = extractelement <4 x i32> %t8, i32 %t7 21 define <4 x i32> @t3(i32 inreg %t7, <4 x i32> inreg %t8) nounwind { 23 %t13 = insertelement <4 x i32> %t8, i32 %t9, i32 %t7
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D | masked-iv-unsafe.ll | 26 %t7 = load double, double* %t6 27 %t8 = fmul double %t7, 4.5 54 %t7 = load double, double* %t6 55 %t8 = fmul double %t7, 4.5 84 %t7 = load double, double* %t6 85 %t8 = fmul double %t7, 4.5 114 %t7 = load double, double* %t6 115 %t8 = fmul double %t7, 4.5 142 %t7 = load double, double* %t6 143 %t8 = fmul double %t7, 4.5 [all …]
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D | masked-iv-safe.ll | 28 %t7 = load double, double* %t6 29 %t8 = fmul double %t7, 4.5 61 %t7 = load double, double* %t6 62 %t8 = fmul double %t7, 4.5 96 %t7 = load double, double* %t6 97 %t8 = fmul double %t7, 4.5 131 %t7 = load double, double* %t6 132 %t8 = fmul double %t7, 4.5 164 %t7 = load double, double* %t6 165 %t8 = fmul double %t7, 4.5 [all …]
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D | StackColoring.ll | 27 %t7 = add i32 %t5, %t6 28 ret i32 %t7 53 %t7 = add i32 %t5, %t6 55 ret i32 %t7 83 %t7 = add i32 %t5, %t6 84 ret i32 %t7 120 %t7 = add i32 %t5, %t6 121 ret i32 %t7 157 %t7 = add i32 %t5, %t6 158 ret i32 %t7 [all …]
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D | 2011-01-10-DagCombineHang.ll | 13 %t7 = add i32 %t6, %b 14 ret i32 %t7
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/external/skia/src/opts/ |
D | SkBlitRow_opts_mips_dsp.cpp | 122 register int32_t t7, t8, t9, s0, s1, s2, s3; in S32A_D565_Opaque_Dither_mips_dsp() local 232 [t4]"=&r"(t4), [t5]"=&r"(t5), [t6]"=&r"(t6), [t7]"=&r"(t7), in S32A_D565_Opaque_Dither_mips_dsp() 270 register uint32_t t6, t7, t8, t9, s0; in S32_D565_Opaque_Dither_mips_dsp() local 361 [t7]"=&r"(t7), [t8]"=&r"(t8), [t9]"=&r"(t9), [s0]"=&r"(s0) in S32_D565_Opaque_Dither_mips_dsp() 550 register uint32_t t0, t1, t2, t3, t4, t5, t6, t7, t8; in S32A_D565_Opaque_mips_dsp() local 643 [t7]"=&r"(t7), [t8]"=&r"(t8) in S32A_D565_Opaque_mips_dsp() 661 register uint32_t t0, t1, t2, t3, t4, t5, t6, t7, t8, t9; in S32A_D565_Blend_mips_dsp() local 745 [t6]"=&r"(t6), [t7]"=&r"(t7), [t8]"=&r"(t8), [t9]"=&r"(t9) in S32A_D565_Blend_mips_dsp() 768 register int32_t t0, t1, t2, t3, t4, t5, t6, t7; in S32_Blend_BlitRow32_mips_dsp() local 802 [t4]"=&r"(t4), [t5]"=&r"(t5), [t6]"=&r"(t6), [t7]"=&r"(t7) in S32_Blend_BlitRow32_mips_dsp()
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/external/speex/libspeex/ |
D | smallft.c | 278 int t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,t10; in dradfg() local 424 t7=idl1; in dradfg() 427 ch2[t4++]=c2[ik]+ar1*c2[t7++]; in dradfg() 447 t7=t2; in dradfg() 452 ch2[t7++]+=ai2*c2[t9++]; in dradfg() 502 t7=t4; in dradfg() 506 cc[t5]=ch[t7]; in dradfg() 509 t7+=ido; in dradfg() 526 t7=t3; in dradfg() 532 cc[i+t7-1]=ch[i+t8-1]+ch[i+t9-1]; in dradfg() [all …]
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/external/libvorbis/lib/ |
D | smallft.c | 276 int t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,t10; in dradfg() local 422 t7=idl1; in dradfg() 425 ch2[t4++]=c2[ik]+ar1*c2[t7++]; in dradfg() 445 t7=t2; in dradfg() 450 ch2[t7++]+=ai2*c2[t9++]; in dradfg() 500 t7=t4; in dradfg() 504 cc[t5]=ch[t7]; in dradfg() 507 t7+=ido; in dradfg() 524 t7=t3; in dradfg() 530 cc[i+t7-1]=ch[i+t8-1]+ch[i+t9-1]; in dradfg() [all …]
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/external/compiler-rt/lib/sanitizer_common/tests/ |
D | sanitizer_bvgraph_test.cc | 270 BV t7; in ShortestPath() local 271 t7.clear(); in ShortestPath() 272 t7.setBit(7); in ShortestPath() 282 EXPECT_TRUE(g.isReachable(1, t7)); in ShortestPath() 284 EXPECT_EQ(0U, g.findPath(1, t7, path, 1)); in ShortestPath() 286 EXPECT_EQ(2U, g.findPath(1, t7, path, 2)); in ShortestPath() 287 EXPECT_EQ(2U, g.findPath(1, t7, path, 3)); in ShortestPath() 288 EXPECT_EQ(2U, g.findPath(1, t7, path, 4)); in ShortestPath() 289 EXPECT_EQ(2U, g.findPath(1, t7, path, 5)); in ShortestPath() 290 EXPECT_EQ(2U, g.findPath(1, t7, path, 6)); in ShortestPath() [all …]
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/external/llvm/test/MC/Mips/ |
D | mips64-register-names-n32-n64.s | 30 # WARNING: mips64-register-names-n32-n64.s:[[@LINE+4]]:9: warning: register names $t4-$t7 are only … 35 # WARNING: mips64-register-names-n32-n64.s:[[@LINE+4]]:9: warning: register names $t4-$t7 are only … 40 # WARNING: mips64-register-names-n32-n64.s:[[@LINE+4]]:9: warning: register names $t4-$t7 are only … 45 # WARNING: mips64-register-names-n32-n64.s:[[@LINE+4]]:9: warning: register names $t4-$t7 are only … 46 # WARNING-NEXT: daddiu $t7, $zero, 0 # {{CHECK}}: encoding: [0x64,0x0f,0x00,0x00] 49 daddiu $t7, $zero, 0 # CHECK: encoding: [0x64,0x0f,0x00,0x00] 68 # [*] - t0-t3 are aliases of t4-t7 for compatibility with both the original 69 # ABI documentation (using t4-t7) and GNU As (using t0-t3)
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/external/compiler-rt/test/asan/TestCases/Posix/ |
D | stack-overflow.cc | 37 int t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, t11, t12, t13; in recursive_func() 45 t7 = z7; in recursive_func() 60 z7 = t7; in recursive_func()
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/external/llvm/test/Transforms/Reassociate/ |
D | mightymul.ll | 12 %t7 = mul i32 %t6, %t6 13 %t8 = mul i32 %t7, %t7
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D | fast-mightymul.ll | 12 %t7 = fmul fast float %t6, %t6 13 %t8 = fmul fast float %t7, %t7
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/external/libcxx/test/std/utilities/intseq/intseq.general/ |
D | integer_seq.pass.cpp | 66 auto t7 = extract ( tup, size7 ()); in main() local 67 static_assert ( std::tuple_size<decltype(t7)>::value == size7::size (), "t7 size wrong"); in main() 68 assert ( t7 == std::make_tuple ( 10, 11, 12, 13, 14, 15, 16 )); in main()
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/external/clang/test/CodeGen/ |
D | ms_struct-bitfield-1.c | 61 } ATTR t7; variable 62 static int a7[(sizeof(t7) == 16) -1];
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D | arm-apcs-zerolength-bitfield.c | 66 struct t7 struct 73 static int arr7_offset[(offsetof(struct t7, bar2) == 5) ? 0 : -1]; argument 74 static int arr7_sizeof[(sizeof(struct t7) == 8) ? 0 : -1];
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D | arm-aapcs-zerolength-bitfield.c | 62 struct t7 struct 69 static int arr7_offset[(offsetof(struct t7, bar2) == 3) ? 0 : -1]; argument 70 static int arr7_sizeof[(sizeof(struct t7) == 4) ? 0 : -1];
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/external/clang/test/CodeGenCXX/ |
D | aarch64-aapcs-zerolength-bitfield.cpp | 63 struct t7 struct 70 static_assert(offsetof(struct t7, bar2) == 3); argument 71 static_assert(sizeof(struct t7) == 4);
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/external/llvm/test/Transforms/IndVarSimplify/ |
D | eliminate-rem.ll | 20 %t7 = srem i64 %t6, %arg ; <i64> [#uses=1] 21 %t8 = getelementptr inbounds double, double* %arg3, i64 %t7 ; <double*> [#uses=1] 51 %t7 = phi i32 [ %t50, %bb49 ], [ 0, %bb4 ] ; <i32> [#uses=2] 66 %t18 = phi i32 [ %t45, %bb44 ], [ %t7, %bb15 ] ; <i32> [#uses=2] 110 %t50 = phi i32 [ %t7, %bb5 ], [ %t45, %bb48 ] ; <i32> [#uses=2]
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