| /external/llvm/test/CodeGen/AArch64/ |
| D | xbfiz.ll | 21 ; CHECK: ubfiz x0, x0, #36, #11
29 ; CHECK: ubfiz w0, w0, #6, #24
37 ; CHECK: ubfiz x0, x0, #36, #11
45 ; CHECK: ubfiz w0, w0, #6, #24
51 ; Check that we don't generate a ubfiz if the lsl has more than one
52 ; use, since we'd just be replacing an and with a ubfiz.
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| D | fast-isel-shift.ll | 96 ; CHECK: ubfiz {{w[0-9]*}}, {{w[0-9]*}}, #4, #1
112 ; CHECK: ubfiz {{w[0-9]*}}, {{w[0-9]*}}, #4, #1
128 ; CHECK: ubfiz {{x[0-9]*}}, {{x[0-9]*}}, #4, #1
153 ; CHECK: ubfiz {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
160 ; CHECK: ubfiz {{w[0-9]*}}, {{w[0-9]*}}, #4, #8
176 ; CHECK: ubfiz {{w[0-9]*}}, {{w[0-9]*}}, #4, #8
192 ; CHECK: ubfiz {{x[0-9]*}}, {{x[0-9]*}}, #4, #8
217 ; CHECK: ubfiz {{w[0-9]*}}, {{w[0-9]*}}, #8, #8
224 ; CHECK: ubfiz {{w[0-9]*}}, {{w[0-9]*}}, #8, #16
240 ; CHECK: ubfiz {{x[0-9]*}}, {{x[0-9]*}}, #8, #16
[all …]
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-bitfield-encoding.s | 16 ubfiz wzr, w0, #31, #1
17 ubfiz xzr, x0, #31, #1
28 ; CHECK: ubfiz xzr, x0, #31, #1 ; encoding: [0x1f,0x00,0x61,0xd3]
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| D | basic-a64-diagnostics.s | 1023 ubfiz w1, w2, #0, #0
1024 ubfiz wsp, w9, #0, #1
1025 ubfiz w9, w10, #32, #1
1026 ubfiz w11, w12, #32, #0
1027 ubfiz w9, w10, #10, #23
1028 ubfiz x3, x5, #12, #53
1029 ubfiz sp, x3, #7, #6
1030 ubfiz w3, wsp, #10, #8
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| D | arm64-aliases.s | 184 ubfiz w0, w0, #1, #4
185 ubfiz x0, x0, #1, #4
199 ; CHECK: ubfiz w0, w0, #1, #4
200 ; CHECK: ubfiz x0, x0, #1, #4
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| D | basic-a64-instructions.s | 1100 ubfiz w9, w10, #0, #1
1101 ubfiz x2, x3, #63, #1
1102 ubfiz x19, x20, #0, #64
1103 ubfiz x9, x10, #5, #59
1104 ubfiz w9, w10, #0, #32
1105 ubfiz w11, w12, #31, #1
1106 ubfiz w13, w14, #29, #3
1107 ubfiz xzr, xzr, #10, #11
|
| /external/v8/test/cctest/ |
| D | test-disasm-arm64.cc | 560 COMPARE(ubfiz(w17, w18, 9, 12), "ubfiz w17, w18, #9, #12"); in TEST_()
561 COMPARE(ubfiz(x19, x20, 10, 11), "ubfiz x19, x20, #10, #11"); in TEST_()
|
| /external/v8/src/arm64/ |
| D | macro-assembler-arm64-inl.h | 1155 ubfiz(rd, rn, lsb, width); in Ubfiz()
|
| D | assembler-arm64.h | 1196 void ubfiz(const Register& rd, const Register& rn, int lsb, int width) { in ubfiz() function
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | basic-a64-instructions.txt | 615 # CHECK: ubfiz x4, x5, #52, #11
617 # CHECK: ubfiz x4, xzr, #1, #6
753 # CHECK: ubfiz xzr, xzr, #10, #11
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| /external/vixl/src/vixl/a64/ |
| D | assembler-a64.h | 1517 void ubfiz(const Register& rd, in ubfiz() function
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| D | macro-assembler-a64.h | 1998 ubfiz(rd, rn, lsb, width); in Ubfiz()
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| /external/vixl/doc/ |
| D | supported-instructions.md | 1324 void ubfiz(const Register& rd,
|
| /external/vixl/test/ |
| D | test-disasm-a64.cc | 570 COMPARE(ubfiz(w17, w18, 9, 12), "ubfiz w17, w18, #9, #12"); in TEST()
571 COMPARE(ubfiz(x19, x20, 10, 11), "ubfiz x19, x20, #10, #11"); in TEST()
|