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Searched refs:vs_inputs (Results 1 – 2 of 2) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_draw_upload.c358 GLbitfield64 vs_inputs = brw->vs.prog_data->inputs_read; in brw_prepare_vertices() local
377 vs_inputs |= VERT_BIT_EDGEFLAG; in brw_prepare_vertices()
387 while (vs_inputs) { in brw_prepare_vertices()
388 GLuint i = ffsll(vs_inputs) - 1; in brw_prepare_vertices()
391 vs_inputs &= ~BITFIELD64_BIT(i); in brw_prepare_vertices()
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_ureg.c107 unsigned vs_inputs[UREG_MAX_INPUT/32]; member
357 ureg->vs_inputs[index/32] |= 1 << (index % 32); in ureg_DECL_vs_input()
1452 if (ureg->vs_inputs[i/32] & (1 << (i%32))) { in emit_decls()