/external/llvm/test/MC/Disassembler/Mips/eva/ |
D | valid_R6-eva.txt | 10 0x7c 0x6d 0x80 0x28 # CHECK: lbue $13, -256($3) 12 0x7c 0x6d 0xa1 0x28 # CHECK: lbue $13, -190($3)
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D | valid_preR6-eva.txt | 14 0x7c 0x6d 0x80 0x28 # CHECK: lbue $13, -256($3) 16 0x7c 0x6d 0xa1 0x28 # CHECK: lbue $13, -190($3)
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/external/ipsec-tools/src/racoon/missing/crypto/rijndael/ |
D | boxes-fst.dat | 81 {0x20,0x10,0x10,0x30}, {0xe5,0xff,0xff,0x1a}, {0xfd,0xf3,0xf3,0x0e}, {0xbf,0xd2,0xd2,0x6d}, 94 {0xd5,0xe7,0xe7,0x32}, {0x8b,0xc8,0xc8,0x43}, {0x6e,0x37,0x37,0x59}, {0xda,0x6d,0x6d,0xb7}, 113 {0x7b,0xb0,0xb0,0xcb}, {0xa8,0x54,0x54,0xfc}, {0x6d,0xbb,0xbb,0xd6}, {0x2c,0x16,0x16,0x3a} 151 {0x30,0x20,0x10,0x10}, {0x1a,0xe5,0xff,0xff}, {0x0e,0xfd,0xf3,0xf3}, {0x6d,0xbf,0xd2,0xd2}, 164 {0x32,0xd5,0xe7,0xe7}, {0x43,0x8b,0xc8,0xc8}, {0x59,0x6e,0x37,0x37}, {0xb7,0xda,0x6d,0x6d}, 183 {0xcb,0x7b,0xb0,0xb0}, {0xfc,0xa8,0x54,0x54}, {0xd6,0x6d,0xbb,0xbb}, {0x3a,0x2c,0x16,0x16} 221 {0x10,0x30,0x20,0x10}, {0xff,0x1a,0xe5,0xff}, {0xf3,0x0e,0xfd,0xf3}, {0xd2,0x6d,0xbf,0xd2}, 234 {0xe7,0x32,0xd5,0xe7}, {0xc8,0x43,0x8b,0xc8}, {0x37,0x59,0x6e,0x37}, {0x6d,0xb7,0xda,0x6d}, 253 {0xb0,0xcb,0x7b,0xb0}, {0x54,0xfc,0xa8,0x54}, {0xbb,0xd6,0x6d,0xbb}, {0x16,0x3a,0x2c,0x16} 291 {0x10,0x10,0x30,0x20}, {0xff,0xff,0x1a,0xe5}, {0xf3,0xf3,0x0e,0xfd}, {0xd2,0xd2,0x6d,0xbf}, [all …]
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | armv8.1a-pan.txt | 7 0x6d,0x42,0x38,0xd5
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D | ldp-preind.predictable.txt | 13 0xa5 0x98 0xc1 0x6d
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D | arm64-memory.txt | 286 0x4a 0x04 0x40 0x6d 298 0x4a 0x04 0x00 0x6d 314 0x4a 0x04 0xc1 0x6d 326 0x4a 0x04 0x81 0x6d
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D | neon-instructions.txt | 213 0x6d 0x34 0x7b 0x6e 273 0x6d 0xa9 0x60 0x4e 337 0x6a 0x15 0x6d 0x0e 516 0xe1 0x6d 0x36 0x2e 517 0xc2 0x6d 0x37 0x4e 518 0xa3 0x6d 0x78 0x2e 519 0x84 0x6d 0x79 0x4e 520 0x65 0x6d 0xba 0x2e 521 0x46 0x6d 0xbb 0x4e 663 0x7f 0xb4 0x6d 0x2e [all …]
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D | gicv3-regs.txt | 182 0x6d 0xc9 0x1c 0xd5
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D | basic-a64-instructions.txt | 1346 0xb8 0x23 0x6d 0x1e 2566 0x6d 0xfb 0xa5 0x78 2591 0x6d 0xfb 0x25 0xb8 2616 0x6d 0xfb 0x65 0xf8 2641 0x6d 0xfb 0xa5 0x3c 2686 0x23 0x95 0x1f 0x6d 2687 0x47 0x2d 0x20 0x6d 2688 0xc2 0x8f 0x7f 0x6d 2782 0x23 0x95 0x9f 0x6d 2783 0x47 0x2d 0xa0 0x6d [all …]
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/external/libvterm/src/encoding/ |
D | DECdrawing.inc | 17 [0x6d] = 0x2514,
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/external/clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/ |
D | p7-1y.cpp | 39 decltype(auto) x6d = { 1, 2 }; // expected-error {{cannot deduce 'decltype(auto)' from initializer … variable
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/external/llvm/lib/Target/Mips/ |
D | MicroMipsInstrFPU.td | 79 ABS_FM_MM<0, 0x6d>; 81 ABS_FM_MM<1, 0x6d>;
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/external/llvm/test/MC/Disassembler/Mips/micromips-dspr2/ |
D | valid.txt | 61 0x00 0x62 0x08 0x6d # CHECK: precr.qb.ph $1, $2, $3 66 0x02 0x0f 0x71 0x6d # CHECK: precrqu_s.qb.ph $14, $15, $16
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/external/llvm/include/llvm/Support/ELFRelocs/ |
D | ARM.def | 116 ELF_RELOC(R_ARM_TLS_LDO12, 0x6d)
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/external/libmicrohttpd/src/datadir/ |
D | spdy-draft.txt | 1575 0x74, 0x2d, 0x6d, 0x64, 0x35, 0x00, 0x00, 0x00, \\ t - m d 5 - - - 1585 0x72, 0x6f, 0x6d, 0x00, 0x00, 0x00, 0x04, 0x68, \\ r o m - - - - h 1587 0x66, 0x2d, 0x6d, 0x61, 0x74, 0x63, 0x68, 0x00, \\ f - m a t c h - 1588 0x00, 0x00, 0x11, 0x69, 0x66, 0x2d, 0x6d, 0x6f, \\ - - - i f - m o 1592 0x6d, 0x61, 0x74, 0x63, 0x68, 0x00, 0x00, 0x00, \\ m a t c h - - - 1595 0x75, 0x6e, 0x6d, 0x6f, 0x64, 0x69, 0x66, 0x69, \\ u n m o d i f i 1598 0x2d, 0x6d, 0x6f, 0x64, 0x69, 0x66, 0x69, 0x65, \\ - m o d i f i e 1601 0x0c, 0x6d, 0x61, 0x78, 0x2d, 0x66, 0x6f, 0x72, \\ - m a x - f o r 1603 0x06, 0x70, 0x72, 0x61, 0x67, 0x6d, 0x61, 0x00, \\ - p r a g m a - 1637 0x00, 0x06, 0x6d, 0x65, 0x74, 0x68, 0x6f, 0x64, \\ - - m e t h o d [all …]
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/external/llvm/test/MC/Disassembler/X86/ |
D | x86-16.txt | 721 0x6d 724 0x66 0x6d
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/external/llvm/test/MC/Disassembler/Mips/micromips-dsp/ |
D | valid.txt | 50 0x02 0x0f 0x71 0x6d # CHECK: precrqu_s.qb.ph $14, $15, $16
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/external/llvm/test/MC/Disassembler/Mips/mips64/ |
D | valid-mips64-xfail.txt | 73 0x46 0xdd 0xd0 0x6d # CHECK: plu.ps $f1, $f26, $f29
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/external/smali/dexlib2/src/main/ragel/ |
D | SyntheticAccessorFSM.rl | 100 put = ((0x59 .. 0x5f) | (0x67 .. 0x6d)) @ {
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/external/llvm/test/MC/Disassembler/Mips/dsp/ |
D | valid.txt | 7 0x7d 0xcf 0x6d 0x90 # CHECK: addq_s.w $13, $14, $15
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/external/llvm/include/llvm/Support/ |
D | Dwarf.def | 225 HANDLE_DW_OP(0x6d, reg29)
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/external/llvm/test/MC/Disassembler/ARM/ |
D | arm-tests.txt | 135 0x13 0x05 0x6d 0xf9
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D | basic-arm-instructions.txt | 1402 0x6d 0xe0 0xa0 0xe1 1412 0x6d 0xe0 0xb0 0xe1 1843 0x1f 0x05 0x6d 0xf8 1844 0x13 0x05 0x6d 0xf9 1853 0x05 0x05 0x6d 0xf8 1854 0x05 0x05 0x6d 0xf9
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/external/llvm/test/MC/Disassembler/Mips/dspr2/ |
D | valid.txt | 8 0x7d 0xcf 0x6d 0x90 # CHECK: addq_s.w $13, $14, $15
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/external/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-vmx.txt | 130 0x10 0x43 0x21 0x6d
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