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Searched refs:xreg (Results 1 – 21 of 21) sorted by relevance

/external/vixl/test/examples/
Dtest-examples.cc120 saved_xregs[0] = simulator.xreg(19); \
121 saved_xregs[1] = simulator.xreg(20); \
122 saved_xregs[2] = simulator.xreg(21); \
123 saved_xregs[3] = simulator.xreg(22); \
124 saved_xregs[4] = simulator.xreg(23); \
125 saved_xregs[5] = simulator.xreg(24); \
126 saved_xregs[6] = simulator.xreg(25); \
127 saved_xregs[7] = simulator.xreg(26); \
128 saved_xregs[8] = simulator.xreg(27); \
129 saved_xregs[9] = simulator.xreg(28); \
[all …]
/external/vixl/examples/
Dswap4.cc75 simulator.xreg(0), simulator.xreg(1), in main()
76 simulator.xreg(2), simulator.xreg(3)); in main()
85 simulator.xreg(0), simulator.xreg(1), in main()
86 simulator.xreg(2), simulator.xreg(3)); in main()
Dliteral.cc73 printf("111 + 222 = %ld\n", simulator.xreg(0)); in LiteralExample()
81 printf("%" PRId64 " + %" PRId64 " = %" PRId64 "\n", a, b, simulator.xreg(0)); in LiteralExample()
83 return simulator.xreg(0); in LiteralExample()
Dgetting-started.cc58 printf("x0 = %" PRIx64 "\n", simulator.xreg(0)); in main()
Dabs.cc64 printf("abs(%ld) = %ld\n", input_value, simulator.xreg(0)); in main()
Dfactorial.cc74 printf("factorial(%ld) = %ld\n", input_val, simulator.xreg(0)); in main()
Dfactorial-rec.cc76 printf("factorial(%ld) = %ld\n", input_val, simulator.xreg(0)); in main()
Dcheck-bounds.cc70 simulator->xreg(0) ? "is" : "is not", in run_function()
Dnon-const-visitor.cc55 int64_t res = simulator.xreg(0); in RunNonConstVisitorTestGeneratedCode()
/external/v8/src/arm64/
Dsimulator-arm64.cc169 return xreg(0); in CallInt64()
242 saved_registers[i] = xreg(register_list.PopLowestIndex().code()); in CheckPCSComplianceAndRun()
258 CHECK_EQ(saved_registers[i], xreg(register_list.PopLowestIndex().code())); in CheckPCSComplianceAndRun()
606 xreg(0), xreg(1), xreg(2), xreg(3), in DoRuntimeCall()
607 xreg(4), xreg(5), xreg(6), xreg(7)); in DoRuntimeCall()
608 ObjectPair result = target(xreg(0), xreg(1), xreg(2), xreg(3), in DoRuntimeCall()
609 xreg(4), xreg(5), xreg(6), xreg(7)); in DoRuntimeCall()
625 TraceSim("Arguments: 0x%016" PRIx64 "\n", xreg(0)); in DoRuntimeCall()
626 target(xreg(0)); in DoRuntimeCall()
700 xreg(0), xreg(1)); in DoRuntimeCall()
[all …]
Dsimulator-arm64.h347 int64_t xreg(unsigned code, Reg31Mode r31mode = Reg31IsZeroRegister) const {
404 int64_t sp() { return xreg(31, Reg31IsStackPointer); }
405 int64_t jssp() { return xreg(kJSSPCode, Reg31IsStackPointer); }
407 return xreg(kFramePointerRegCode, Reg31IsStackPointer);
/external/v8/test/cctest/
Dtest-utils-arm64.cc101 int64_t result_x = core->xreg(reg.code()); in Equal32()
116 uint64_t result = core->xreg(reg.code()); in Equal64()
150 int64_t expected = core->xreg(reg0.code()); in Equal64()
151 int64_t result = core->xreg(reg1.code()); in Equal64()
192 if (a->xreg(i) != b->xreg(i)) { in EqualRegisters()
194 i, a->xreg(i), b->xreg(i)); in EqualRegisters()
Dtest-utils-arm64.h66 inline int64_t xreg(unsigned code) const { in xreg() function
Dtest-assembler-arm64.cc1901 CHECK_EQUAL_64(core.xreg(3) + kInstructionSize, x0); in TEST()
/external/vixl/test/
Dtest-utils-a64.cc124 int64_t result_x = core->xreg(reg.code()); in Equal32()
137 uint64_t result = core->xreg(reg.code()); in Equal64()
182 int64_t expected = core->xreg(reg0.code()); in Equal64()
183 int64_t result = core->xreg(reg1.code()); in Equal64()
224 if (a->xreg(i) != b->xreg(i)) { in EqualRegisters()
226 i, a->xreg(i), b->xreg(i)); in EqualRegisters()
Dtest-utils-a64.h87 inline int64_t xreg(unsigned code) const { in xreg() function
Dtest-assembler-a64.cc2083 ASSERT_EQUAL_64(core.xreg(3) + kInstructionSize, x0); in TEST()
/external/vixl/src/vixl/a64/
Dsimulator-a64.cc843 const Instruction* target = Instruction::Cast(xreg(instr->Rn())); in VisitUnconditionalBranchToRegister()
859 bool bit_zero = ((xreg(instr->Rt()) >> bit_pos) & 1) == 0; in VisitTestBranch()
877 case CBZ_x: take_branch = (xreg(rt) == 0); break; in VisitCompareBranch()
879 case CBNZ_x: take_branch = (xreg(rt) != 0); break; in VisitCompareBranch()
1070 int64_t offset = ExtendValue(kXRegSize, xreg(instr->Rm()), ext, in VisitLoadStoreRegisterOffset()
1117 case STR_x: Memory::Write<uint64_t>(address, xreg(srcdst)); break; in LoadStoreHelper()
1232 Memory::Write<uint64_t>(address, xreg(rt)); in LoadStorePairHelper()
1233 Memory::Write<uint64_t>(address2, xreg(rt2)); in LoadStorePairHelper()
1419 Memory::Write<uint64_t>(address, xreg(rt)); in VisitLoadStoreExclusive()
1428 Memory::Write<uint64_t>(address, xreg(rt)); in VisitLoadStoreExclusive()
[all …]
Ddebugger-a64.cc844 uint64_t reg_value = debugger->xreg(value().code(), Reg31IsStackPointer); in ToAddress()
Dsimulator-a64.h750 int64_t xreg(unsigned code,
/external/vixl/doc/
Dgetting-started.md201 printf("x0 = %" PRIx64 "\n", simulator.xreg(0));