| /art/compiler/debug/dwarf/ |
| D | dwarf_test.cc | 35 const bool is64bit = false; in TEST_F() local
125 WriteCIE(is64bit, Reg(is64bit ? 16 : 8), in TEST_F()
129 WriteFDE(is64bit, 0, 0, 0x01000000, 0x01000000, ArrayRef<const uint8_t>(*opcodes.data()), in TEST_F()
133 CheckObjdumpOutput(is64bit, "-W"); in TEST_F()
137 constexpr bool is64bit = true; in TEST_F() local
139 WriteCIE(is64bit, Reg(16), in TEST_F()
144 WriteFDE(is64bit, 0, 0, 0x0100000000000000, 0x0200000000000000, in TEST_F()
150 CheckObjdumpOutput(is64bit, "-W"); in TEST_F()
156 constexpr bool is64bit = true; in TEST_F() local
179 WriteCIE(is64bit, Reg(16), in TEST_F()
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| D | headers.h | 41 void WriteCIE(bool is64bit, in WriteCIE() argument
58 if (is64bit) { in WriteCIE()
74 writer.Pad(is64bit ? 8 : 4); in WriteCIE()
80 void WriteFDE(bool is64bit, in WriteFDE() argument
112 if (is64bit) { in WriteFDE()
121 writer.Pad(is64bit ? 8 : 4); in WriteFDE()
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| D | dwarf_test.h | 110 std::vector<std::string> Objdump(bool is64bit, const char* args) { in Objdump() argument
111 if (is64bit) { in Objdump()
119 void CheckObjdumpOutput(bool is64bit, const char* args) { in CheckObjdumpOutput() argument
120 std::vector<std::string> actual_lines = Objdump(is64bit, args); in CheckObjdumpOutput()
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| /art/compiler/debug/ |
| D | elf_debug_frame_writer.h | 38 bool is64bit = Is64BitInstructionSet(isa); in WriteCIE() local
61 WriteCIE(is64bit, return_reg, opcodes, format, buffer); in WriteCIE()
84 WriteCIE(is64bit, return_reg, opcodes, format, buffer); in WriteCIE()
108 WriteCIE(is64bit, return_reg, opcodes, format, buffer); in WriteCIE()
134 WriteCIE(is64bit, return_reg, opcodes, format, buffer); in WriteCIE()
160 WriteCIE(is64bit, return_reg, opcodes, format, buffer); in WriteCIE()
215 const bool is64bit = Is64BitInstructionSet(builder->GetIsa()); in WriteCFISection() local
233 WriteFDE(is64bit, cfi_address, cie_address, in WriteCFISection()
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| D | elf_debug_loc_writer.h | 204 const bool is64bit = Is64BitInstructionSet(isa); in WriteDebugLocEntry() local
263 if (is64bit) { in WriteDebugLocEntry()
278 if (is64bit) { in WriteDebugLocEntry()
297 if (is64bit) { in WriteDebugLocEntry()
306 if (is64bit) { in WriteDebugLocEntry()
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| D | elf_debug_line_writer.h | 56 const bool is64bit = Is64BitInstructionSet(builder_->GetIsa()); in WriteCompilationUnit() local
86 dwarf::DebugLineOpCodeWriter<> opcodes(is64bit, code_factor_bits_); in WriteCompilationUnit()
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| /art/disassembler/ |
| D | disassembler_mips.h | 29 DisassemblerMips(DisassemblerOptions* options, bool is64bit) in DisassemblerMips() argument
31 is64bit_(is64bit), in DisassemblerMips()
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| /art/compiler/ |
| D | cfi_test.h | 49 constexpr bool is64bit = false; in GenerateExpected() local
51 dwarf::WriteCIE(is64bit, dwarf::Reg(8), in GenerateExpected()
54 dwarf::WriteFDE(is64bit, 0, 0, 0, actual_asm.size(), ArrayRef<const uint8_t>(actual_cfi), in GenerateExpected()
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.h | 370 void cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit);
371 void cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit);
403 void movd(XmmRegister dst, CpuRegister src, bool is64bit);
404 void movd(CpuRegister dst, XmmRegister src, bool is64bit);
429 void cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit);
430 void cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit);
432 void cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit);
433 void cvtsi2sd(XmmRegister dst, const Address& src, bool is64bit);
444 void cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit);
446 void cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit);
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| D | assembler_x86_64.cc | 217 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit) { in cmov() argument
219 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex()); in cmov()
226 void X86_64Assembler::cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit) { in cmov() argument
228 if (is64bit) { in cmov()
443 void X86_64Assembler::movd(XmmRegister dst, CpuRegister src, bool is64bit) { in movd() argument
446 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex()); in movd()
452 void X86_64Assembler::movd(CpuRegister dst, XmmRegister src, bool is64bit) { in movd() argument
455 EmitOptionalRex(false, is64bit, src.NeedsRex(), false, dst.NeedsRex()); in movd()
678 void X86_64Assembler::cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit) { in cvtsi2ss() argument
681 if (is64bit) { in cvtsi2ss()
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| /art/compiler/optimizing/ |
| D | intrinsics_mips64.cc | 149 static void MoveFPToInt(LocationSummary* locations, bool is64bit, Mips64Assembler* assembler) { in MoveFPToInt() argument
153 if (is64bit) { in MoveFPToInt()
186 static void MoveIntToFP(LocationSummary* locations, bool is64bit, Mips64Assembler* assembler) { in MoveIntToFP() argument
190 if (is64bit) { in MoveIntToFP()
276 bool is64bit, in GenNumberOfLeadingZeroes() argument
281 if (is64bit) { in GenNumberOfLeadingZeroes()
307 bool is64bit, in GenNumberOfTrailingZeroes() argument
312 if (is64bit) { in GenNumberOfTrailingZeroes()
388 static void MathAbsFP(LocationSummary* locations, bool is64bit, Mips64Assembler* assembler) { in MathAbsFP() argument
392 if (is64bit) { in MathAbsFP()
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| D | intrinsics_arm64.cc | 185 static void MoveFPToInt(LocationSummary* locations, bool is64bit, vixl::MacroAssembler* masm) { in MoveFPToInt() argument
188 __ Fmov(is64bit ? XRegisterFrom(output) : WRegisterFrom(output), in MoveFPToInt()
189 is64bit ? DRegisterFrom(input) : SRegisterFrom(input)); in MoveFPToInt()
192 static void MoveIntToFP(LocationSummary* locations, bool is64bit, vixl::MacroAssembler* masm) { in MoveIntToFP() argument
195 __ Fmov(is64bit ? DRegisterFrom(output) : SRegisterFrom(output), in MoveIntToFP()
196 is64bit ? XRegisterFrom(input) : WRegisterFrom(input)); in MoveIntToFP()
412 static void MathAbsFP(LocationSummary* locations, bool is64bit, vixl::MacroAssembler* masm) { in MathAbsFP() argument
416 FPRegister in_reg = is64bit ? DRegisterFrom(in) : SRegisterFrom(in); in MathAbsFP()
417 FPRegister out_reg = is64bit ? DRegisterFrom(out) : SRegisterFrom(out); in MathAbsFP()
447 bool is64bit, in GenAbsInteger() argument
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| D | intrinsics_mips.cc | 160 static void MoveFPToInt(LocationSummary* locations, bool is64bit, MipsAssembler* assembler) { in MoveFPToInt() argument
163 if (is64bit) { in MoveFPToInt()
202 static void MoveIntToFP(LocationSummary* locations, bool is64bit, MipsAssembler* assembler) { in MoveIntToFP() argument
205 if (is64bit) { in MoveIntToFP()
443 bool is64bit, in GenNumberOfLeadingZeroes() argument
447 if (is64bit) { in GenNumberOfLeadingZeroes()
491 bool is64bit, in GenNumberOfTrailingZeroes() argument
498 if (is64bit) { in GenNumberOfTrailingZeroes()
546 if (is64bit) { in GenNumberOfTrailingZeroes()
748 static void MathAbsFP(LocationSummary* locations, bool is64bit, MipsAssembler* assembler) { in MathAbsFP() argument
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| D | code_generator_mips64.h | 239 void GenerateIntLongCompare(IfCondition cond, bool is64bit, LocationSummary* locations);
241 bool is64bit,
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| D | intrinsics_x86.cc | 88 static void CreateFPToIntLocations(ArenaAllocator* arena, HInvoke* invoke, bool is64bit) { in CreateFPToIntLocations() argument
94 if (is64bit) { in CreateFPToIntLocations()
99 static void CreateIntToFPLocations(ArenaAllocator* arena, HInvoke* invoke, bool is64bit) { in CreateIntToFPLocations() argument
105 if (is64bit) { in CreateIntToFPLocations()
111 static void MoveFPToInt(LocationSummary* locations, bool is64bit, X86Assembler* assembler) { in MoveFPToInt() argument
114 if (is64bit) { in MoveFPToInt()
126 static void MoveIntToFP(LocationSummary* locations, bool is64bit, X86Assembler* assembler) { in MoveIntToFP() argument
129 if (is64bit) { in MoveIntToFP()
274 bool is64bit, in MathAbsFP() argument
285 if (is64bit) { in MathAbsFP()
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| D | intrinsics_arm.cc | 84 static void MoveFPToInt(LocationSummary* locations, bool is64bit, ArmAssembler* assembler) { in MoveFPToInt() argument
87 if (is64bit) { in MoveFPToInt()
96 static void MoveIntToFP(LocationSummary* locations, bool is64bit, ArmAssembler* assembler) { in MoveIntToFP() argument
99 if (is64bit) { in MoveIntToFP()
243 static void MathAbsFP(LocationSummary* locations, bool is64bit, ArmAssembler* assembler) { in MathAbsFP() argument
247 if (is64bit) { in MathAbsFP()
282 bool is64bit, in GenAbsInteger() argument
289 if (is64bit) { in GenAbsInteger()
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| D | intrinsics_x86_64.cc | 98 static void MoveFPToInt(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler) { in MoveFPToInt() argument
101 __ movd(output.AsRegister<CpuRegister>(), input.AsFpuRegister<XmmRegister>(), is64bit); in MoveFPToInt()
104 static void MoveIntToFP(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler) { in MoveIntToFP() argument
107 __ movd(output.AsFpuRegister<XmmRegister>(), input.AsRegister<CpuRegister>(), is64bit); in MoveIntToFP()
208 bool is64bit, in MathAbsFP() argument
219 if (is64bit) { in MathAbsFP()
253 static void GenAbsInteger(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler) { in GenAbsInteger() argument
258 if (is64bit) { in GenAbsInteger()
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| D | code_generator_mips64.cc | 2242 bool is64bit, in GenerateIntLongCompare() argument
2251 if (is64bit) { in GenerateIntLongCompare()
2377 bool is64bit, in GenerateIntLongCompareAndBranch() argument
2386 if (is64bit) { in GenerateIntLongCompareAndBranch()
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