| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 161 INTRINSIC_VOID, enumerator
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| D | SelectionDAGNodes.h | 464 NodeType == ISD::INTRINSIC_VOID) && ((SubclassData >> 13) & 1);
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | R600ISelLowering.cpp | 40 setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom); in R600TargetLowering()
253 case ISD::INTRINSIC_VOID: { in LowerOperation()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 117 case ISD::INTRINSIC_VOID: in getOperationName()
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| D | TargetLowering.cpp | 1147 Op.getOpcode() == ISD::INTRINSIC_VOID) && in computeKnownBitsForTargetNode()
1162 Op.getOpcode() == ISD::INTRINSIC_VOID) && in ComputeNumSignBitsForTargetNode()
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| D | SelectionDAG.cpp | 2509 case ISD::INTRINSIC_VOID: in computeKnownBits()
2744 Op.getOpcode() == ISD::INTRINSIC_VOID) { in ComputeNumSignBits()
4966 assert((Opcode == ISD::INTRINSIC_VOID || in getMemIntrinsicNode()
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| D | SelectionDAGISel.cpp | 3420 N->getOpcode() != ISD::INTRINSIC_VOID) { in CannotYetSelect()
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| D | LegalizeDAG.cpp | 1229 case ISD::INTRINSIC_VOID: in LegalizeOp()
3945 case ISD::INTRINSIC_VOID: in ExpandNode()
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| D | SelectionDAGBuilder.cpp | 3640 if (!IsTgtIntrinsic || Info.opc == ISD::INTRINSIC_VOID || in visitTargetIntrinsic()
3673 Result = DAG.getNode(ISD::INTRINSIC_VOID, getCurSDLoc(), VTs, Ops); in visitTargetIntrinsic()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 132 setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom); in SITargetLowering()
976 case ISD::INTRINSIC_VOID: return LowerINTRINSIC_VOID(Op, DAG); in LowerOperation()
1062 Res.size() > 1 ? ISD::INTRINSIC_W_CHAIN : ISD::INTRINSIC_VOID, DL, in LowerBRCOND()
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| D | R600ISelLowering.cpp | 76 setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom); in R600TargetLowering()
613 case ISD::INTRINSIC_VOID: { in LowerOperation()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelDAGToDAG.cpp | 831 case ISD::INTRINSIC_VOID: { in selectNode()
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| D | MipsSEISelLowering.cpp | 148 setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom); in MipsSETargetLowering()
375 case ISD::INTRINSIC_VOID: return lowerINTRINSIC_VOID(Op, DAG); in LowerOperation()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 178 setTargetDAGCombine(ISD::INTRINSIC_VOID); in XCoreTargetLowering()
1624 case ISD::INTRINSIC_VOID: in PerformDAGCombine()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 853 setTargetDAGCombine(ISD::INTRINSIC_VOID); in PPCTargetLowering()
7626 StoreChain = DAG.getMemIntrinsicNode(ISD::INTRINSIC_VOID, in LowerEXTRACT_VECTOR_ELT()
7842 StoreChain = DAG.getMemIntrinsicNode(ISD::INTRINSIC_VOID, in LowerVectorStore()
9328 if (N->getOpcode() == ISD::INTRINSIC_VOID) { in isConsecutiveLS()
10149 case ISD::INTRINSIC_VOID: { in expandVSXStoreForLE()
10497 case ISD::INTRINSIC_VOID: { in PerformDAGCombine()
11336 Info.opc = ISD::INTRINSIC_VOID; in getTgtMemIntrinsic()
11371 Info.opc = ISD::INTRINSIC_VOID; in getTgtMemIntrinsic()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 557 def intrinsic_void : SDNode<"ISD::INTRINSIC_VOID",
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 504 setTargetDAGCombine(ISD::INTRINSIC_VOID); in AArch64TargetLowering()
766 case ISD::INTRINSIC_VOID: { in computeKnownBitsForTargetNode()
6768 Info.opc = ISD::INTRINSIC_VOID; in getTgtMemIntrinsic()
9658 case ISD::INTRINSIC_VOID: in PerformDAGCombine()
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| D | AArch64ISelDAGToDAG.cpp | 2716 case ISD::INTRINSIC_VOID: { in Select()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 612 setTargetDAGCombine(ISD::INTRINSIC_VOID); in ARMTargetLowering()
2890 return DAG.getNode(ISD::INTRINSIC_VOID, dl, MVT::Other, Op.getOperand(0), in LowerATOMIC_FENCE()
9489 const bool isIntrinsic = (N->getOpcode() == ISD::INTRINSIC_VOID || in CombineBaseUpdate()
10604 case ISD::INTRINSIC_VOID: in PerformDAGCombine()
11747 Info.opc = ISD::INTRINSIC_VOID; in getTgtMemIntrinsic()
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| D | ARMISelDAGToDAG.cpp | 3042 case ISD::INTRINSIC_VOID: in Select()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 1471 Parent->getOpcode() != ISD::INTRINSIC_VOID && // nontemporal stores in selectAddr()
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| D | X86ISelLowering.cpp | 1741 setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom); in X86TargetLowering()
20104 case ISD::INTRINSIC_VOID: in LowerOperation()
22529 Opc == ISD::INTRINSIC_VOID) && in computeKnownBitsForTargetNode()
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