357     const MachineOperand &MO = MI->getOperand(i);  in ProcessMI()  local
358     if (MO.isFI()) {  in ProcessMI()
360       int FI = MO.getIndex();  in ProcessMI()
371     if (MO.isRegMask()) {  in ProcessMI()
372       PhysRegClobbers.setBitsNotInMask(MO.getRegMask());  in ProcessMI()
376     if (!MO.isReg())  in ProcessMI()
378     unsigned Reg = MO.getReg();  in ProcessMI()
384     if (!MO.isDef()) {  in ProcessMI()
392     if (MO.isImplicit()) {  in ProcessMI()
395       if (!MO.isDead())  in ProcessMI()
480       const MachineOperand &MO = TI->getOperand(i);  in HoistRegionPostRA()  local
481       if (!MO.isReg())  in HoistRegionPostRA()
483       unsigned Reg = MO.getReg();  in HoistRegionPostRA()
509         const MachineOperand &MO = MI->getOperand(j);  in HoistRegionPostRA()  local
510         if (!MO.isReg() || MO.isDef() || !MO.getReg())  in HoistRegionPostRA()
512         unsigned Reg = MO.getReg();  in HoistRegionPostRA()
539         MachineOperand &MO = MI->getOperand(i);  in AddToLiveIns()  local
540         if (!MO.isReg() || !MO.getReg() || MO.isDef()) continue;  in AddToLiveIns()
541         if (MO.getReg() == Reg || TRI->isSuperRegister(Reg, MO.getReg()))  in AddToLiveIns()
542           MO.setIsKill(false);  in AddToLiveIns()
728     const MachineOperand &MO = I->getOperand(0);  in SinkIntoLoop()  local
729     if (!MO.isDef() || !MO.isReg() || !MO.getReg())  in SinkIntoLoop()
731     if (!MRI->hasOneDef(MO.getReg()))  in SinkIntoLoop()
735     for (MachineInstr &MI : MRI->use_instructions(MO.getReg())) {  in SinkIntoLoop()
760 static bool isOperandKill(const MachineOperand &MO, MachineRegisterInfo *MRI) {  in isOperandKill()  argument
761   return MO.isKill() || MRI->hasOneNonDBGUse(MO.getReg());  in isOperandKill()
811     const MachineOperand &MO = MI->getOperand(i);  in calcRegisterCost()  local
812     if (!MO.isReg() || MO.isImplicit())  in calcRegisterCost()
814     unsigned Reg = MO.getReg();  in calcRegisterCost()
824     if (MO.isDef())  in calcRegisterCost()
827       bool isKill = isOperandKill(MO, MRI);  in calcRegisterCost()
893     const MachineOperand &MO = I.getOperand(i);  in IsLoopInvariantInst()  local
895     if (!MO.isReg())  in IsLoopInvariantInst()
898     unsigned Reg = MO.getReg();  in IsLoopInvariantInst()
903       if (MO.isUse()) {  in IsLoopInvariantInst()
911       } else if (!MO.isDead()) {  in IsLoopInvariantInst()
921     if (!MO.isUse())  in IsLoopInvariantInst()
944     for (const MachineOperand &MO : MI->operands()) {  in HasLoopPHIUse()  local
945       if (!MO.isReg() || !MO.isDef())  in HasLoopPHIUse()
947       unsigned Reg = MO.getReg();  in HasLoopPHIUse()
986       const MachineOperand &MO = UseMI.getOperand(i);  in HasHighOperandLatency()  local
987       if (!MO.isReg() || !MO.isUse())  in HasHighOperandLatency()
989       unsigned MOReg = MO.getReg();  in HasHighOperandLatency()
1103     const MachineOperand &MO = MI.getOperand(i);  in IsProfitableToHoist()  local
1104     if (!MO.isReg() || MO.isImplicit())  in IsProfitableToHoist()
1106     unsigned Reg = MO.getReg();  in IsProfitableToHoist()
1109     if (MO.isDef() && HasHighOperandLatency(MI, i, Reg)) {  in IsProfitableToHoist()
1261       const MachineOperand &MO = MI->getOperand(i);  in EliminateCSE()  local
1264       assert((!MO.isReg() || MO.getReg() == 0 ||  in EliminateCSE()
1265               !TargetRegisterInfo::isPhysicalRegister(MO.getReg()) ||  in EliminateCSE()
1266               MO.getReg() == Dup->getOperand(i).getReg()) &&  in EliminateCSE()
1269       if (MO.isReg() && MO.isDef() &&  in EliminateCSE()
1270           !TargetRegisterInfo::isPhysicalRegister(MO.getReg()))  in EliminateCSE()
1364       MachineOperand &MO = MI->getOperand(i);  in Hoist()  local
1365       if (MO.isReg() && MO.isDef() && !MO.isDead())  in Hoist()
1366         MRI->clearKillFlags(MO.getReg());  in Hoist()