2149   unsigned NewOpc = 0;  in LowerMUL()  local
2154     NewOpc = AArch64ISD::SMULL;  in LowerMUL()
2159       NewOpc = AArch64ISD::UMULL;  in LowerMUL()
2164         NewOpc = AArch64ISD::SMULL;  in LowerMUL()
2167         NewOpc =  AArch64ISD::UMULL;  in LowerMUL()
2171         NewOpc =  AArch64ISD::UMULL;  in LowerMUL()
2176     if (!NewOpc) {  in LowerMUL()
2195     return DAG.getNode(NewOpc, DL, VT, Op0, Op1);  in LowerMUL()
2204                      DAG.getNode(NewOpc, DL, VT,  in LowerMUL()
2206                      DAG.getNode(NewOpc, DL, VT,  in LowerMUL()
9077     unsigned NewOpc = 0;  in performNEONPostLDSTCombine()  local
9082     case Intrinsic::aarch64_neon_ld2:       NewOpc = AArch64ISD::LD2post;  in performNEONPostLDSTCombine()
9084     case Intrinsic::aarch64_neon_ld3:       NewOpc = AArch64ISD::LD3post;  in performNEONPostLDSTCombine()
9086     case Intrinsic::aarch64_neon_ld4:       NewOpc = AArch64ISD::LD4post;  in performNEONPostLDSTCombine()
9088     case Intrinsic::aarch64_neon_st2:       NewOpc = AArch64ISD::ST2post;  in performNEONPostLDSTCombine()
9090     case Intrinsic::aarch64_neon_st3:       NewOpc = AArch64ISD::ST3post;  in performNEONPostLDSTCombine()
9092     case Intrinsic::aarch64_neon_st4:       NewOpc = AArch64ISD::ST4post;  in performNEONPostLDSTCombine()
9094     case Intrinsic::aarch64_neon_ld1x2:     NewOpc = AArch64ISD::LD1x2post;  in performNEONPostLDSTCombine()
9096     case Intrinsic::aarch64_neon_ld1x3:     NewOpc = AArch64ISD::LD1x3post;  in performNEONPostLDSTCombine()
9098     case Intrinsic::aarch64_neon_ld1x4:     NewOpc = AArch64ISD::LD1x4post;  in performNEONPostLDSTCombine()
9100     case Intrinsic::aarch64_neon_st1x2:     NewOpc = AArch64ISD::ST1x2post;  in performNEONPostLDSTCombine()
9102     case Intrinsic::aarch64_neon_st1x3:     NewOpc = AArch64ISD::ST1x3post;  in performNEONPostLDSTCombine()
9104     case Intrinsic::aarch64_neon_st1x4:     NewOpc = AArch64ISD::ST1x4post;  in performNEONPostLDSTCombine()
9106     case Intrinsic::aarch64_neon_ld2r:      NewOpc = AArch64ISD::LD2DUPpost;  in performNEONPostLDSTCombine()
9108     case Intrinsic::aarch64_neon_ld3r:      NewOpc = AArch64ISD::LD3DUPpost;  in performNEONPostLDSTCombine()
9110     case Intrinsic::aarch64_neon_ld4r:      NewOpc = AArch64ISD::LD4DUPpost;  in performNEONPostLDSTCombine()
9112     case Intrinsic::aarch64_neon_ld2lane:   NewOpc = AArch64ISD::LD2LANEpost;  in performNEONPostLDSTCombine()
9114     case Intrinsic::aarch64_neon_ld3lane:   NewOpc = AArch64ISD::LD3LANEpost;  in performNEONPostLDSTCombine()
9116     case Intrinsic::aarch64_neon_ld4lane:   NewOpc = AArch64ISD::LD4LANEpost;  in performNEONPostLDSTCombine()
9118     case Intrinsic::aarch64_neon_st2lane:   NewOpc = AArch64ISD::ST2LANEpost;  in performNEONPostLDSTCombine()
9120     case Intrinsic::aarch64_neon_st3lane:   NewOpc = AArch64ISD::ST3LANEpost;  in performNEONPostLDSTCombine()
9122     case Intrinsic::aarch64_neon_st4lane:   NewOpc = AArch64ISD::ST4LANEpost;  in performNEONPostLDSTCombine()
9163     SDValue UpdN = DAG.getMemIntrinsicNode(NewOpc, SDLoc(N), SDTys, Ops,  in performNEONPostLDSTCombine()