Lines Matching refs:MO
54 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
204 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() argument
207 if (MO.isReg()) in getMachineOpValue()
208 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
210 assert(MO.isImm() && "did not expect relocated expression"); in getMachineOpValue()
211 return static_cast<unsigned>(MO.getImm()); in getMachineOpValue()
218 const MCOperand &MO = MI.getOperand(OpIdx); in getLdStUImm12OpValue() local
221 if (MO.isImm()) in getLdStUImm12OpValue()
222 ImmVal = static_cast<uint32_t>(MO.getImm()); in getLdStUImm12OpValue()
224 assert(MO.isExpr() && "unable to encode load/store imm operand"); in getLdStUImm12OpValue()
226 Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc())); in getLdStUImm12OpValue()
239 const MCOperand &MO = MI.getOperand(OpIdx); in getAdrLabelOpValue() local
242 if (MO.isImm()) in getAdrLabelOpValue()
243 return MO.getImm(); in getAdrLabelOpValue()
244 assert(MO.isExpr() && "Unexpected target type!"); in getAdrLabelOpValue()
245 const MCExpr *Expr = MO.getExpr(); in getAdrLabelOpValue()
266 const MCOperand &MO = MI.getOperand(OpIdx); in getAddSubImmOpValue() local
273 if (MO.isImm()) in getAddSubImmOpValue()
274 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << 12)); in getAddSubImmOpValue()
275 assert(MO.isExpr() && "Unable to encode MCOperand!"); in getAddSubImmOpValue()
276 const MCExpr *Expr = MO.getExpr(); in getAddSubImmOpValue()
292 const MCOperand &MO = MI.getOperand(OpIdx); in getCondBranchTargetOpValue() local
295 if (MO.isImm()) in getCondBranchTargetOpValue()
296 return MO.getImm(); in getCondBranchTargetOpValue()
297 assert(MO.isExpr() && "Unexpected target type!"); in getCondBranchTargetOpValue()
300 Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc())); in getCondBranchTargetOpValue()
314 const MCOperand &MO = MI.getOperand(OpIdx); in getLoadLiteralOpValue() local
317 if (MO.isImm()) in getLoadLiteralOpValue()
318 return MO.getImm(); in getLoadLiteralOpValue()
319 assert(MO.isExpr() && "Unexpected target type!"); in getLoadLiteralOpValue()
322 Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc())); in getLoadLiteralOpValue()
343 const MCOperand &MO = MI.getOperand(OpIdx); in getMoveWideImmOpValue() local
345 if (MO.isImm()) in getMoveWideImmOpValue()
346 return MO.getImm(); in getMoveWideImmOpValue()
347 assert(MO.isExpr() && "Unexpected movz/movk immediate"); in getMoveWideImmOpValue()
350 0, MO.getExpr(), MCFixupKind(AArch64::fixup_aarch64_movw), MI.getLoc())); in getMoveWideImmOpValue()
362 const MCOperand &MO = MI.getOperand(OpIdx); in getTestBranchTargetOpValue() local
365 if (MO.isImm()) in getTestBranchTargetOpValue()
366 return MO.getImm(); in getTestBranchTargetOpValue()
367 assert(MO.isExpr() && "Unexpected ADR target type!"); in getTestBranchTargetOpValue()
370 Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc())); in getTestBranchTargetOpValue()
384 const MCOperand &MO = MI.getOperand(OpIdx); in getBranchTargetOpValue() local
387 if (MO.isImm()) in getBranchTargetOpValue()
388 return MO.getImm(); in getBranchTargetOpValue()
389 assert(MO.isExpr() && "Unexpected ADR target type!"); in getBranchTargetOpValue()
394 Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc())); in getBranchTargetOpValue()
412 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShifterOpValue() local
413 assert(MO.isImm() && "Expected an immediate value for the shift amount!"); in getVecShifterOpValue()
415 switch (MO.getImm()) { in getVecShifterOpValue()
435 const MCOperand &MO = MI.getOperand(OpIdx); in getSIMDShift64OpValue() local
436 assert(MO.isImm() && "Expected an immediate value for the shift amount!"); in getSIMDShift64OpValue()
437 return 64 - (MO.getImm()); in getSIMDShift64OpValue()
443 const MCOperand &MO = MI.getOperand(OpIdx); in getSIMDShift64_32OpValue() local
444 assert(MO.isImm() && "Expected an immediate value for the shift amount!"); in getSIMDShift64_32OpValue()
445 return 64 - (MO.getImm() | 32); in getSIMDShift64_32OpValue()
452 const MCOperand &MO = MI.getOperand(OpIdx); in getSIMDShift32OpValue() local
453 assert(MO.isImm() && "Expected an immediate value for the shift amount!"); in getSIMDShift32OpValue()
454 return 32 - (MO.getImm() | 16); in getSIMDShift32OpValue()
461 const MCOperand &MO = MI.getOperand(OpIdx); in getSIMDShift16OpValue() local
462 assert(MO.isImm() && "Expected an immediate value for the shift amount!"); in getSIMDShift16OpValue()
463 return 16 - (MO.getImm() | 8); in getSIMDShift16OpValue()
471 const MCOperand &MO = MI.getOperand(OpIdx); in getFixedPointScaleOpValue() local
472 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getFixedPointScaleOpValue()
473 return 64 - MO.getImm(); in getFixedPointScaleOpValue()
480 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftR64OpValue() local
481 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getVecShiftR64OpValue()
482 return 64 - MO.getImm(); in getVecShiftR64OpValue()
489 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftR32OpValue() local
490 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getVecShiftR32OpValue()
491 return 32 - MO.getImm(); in getVecShiftR32OpValue()
498 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftR16OpValue() local
499 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getVecShiftR16OpValue()
500 return 16 - MO.getImm(); in getVecShiftR16OpValue()
507 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftR8OpValue() local
508 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getVecShiftR8OpValue()
509 return 8 - MO.getImm(); in getVecShiftR8OpValue()
516 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftL64OpValue() local
517 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getVecShiftL64OpValue()
518 return MO.getImm() - 64; in getVecShiftL64OpValue()
525 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftL32OpValue() local
526 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getVecShiftL32OpValue()
527 return MO.getImm() - 32; in getVecShiftL32OpValue()
534 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftL16OpValue() local
535 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getVecShiftL16OpValue()
536 return MO.getImm() - 16; in getVecShiftL16OpValue()
543 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftL8OpValue() local
544 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getVecShiftL8OpValue()
545 return MO.getImm() - 8; in getVecShiftL8OpValue()
553 const MCOperand &MO = MI.getOperand(OpIdx); in getMoveVecShifterOpValue() local
554 assert(MO.isImm() && in getMoveVecShifterOpValue()
556 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue()