1181                                                MachineInstr *MIb) const {  in checkInstOffsetsDoNotOverlap()
1186       getMemOpBaseRegImmOfs(MIb, BaseReg1, Offset1, &RI)) {  in checkInstOffsetsDoNotOverlap()
1187     assert(MIa->hasOneMemOperand() && MIb->hasOneMemOperand() &&  in checkInstOffsetsDoNotOverlap()
1190     unsigned Width1 = (*MIb->memoperands_begin())->getSize();  in checkInstOffsetsDoNotOverlap()
1201                                                   MachineInstr *MIb,  in areMemAccessesTriviallyDisjoint()  argument
1205   assert(MIb && (MIb->mayLoad() || MIb->mayStore()) &&  in areMemAccessesTriviallyDisjoint()
1208   if (MIa->hasUnmodeledSideEffects() || MIb->hasUnmodeledSideEffects())  in areMemAccessesTriviallyDisjoint()
1212   if (MIa->hasOrderedMemoryRef() || MIb->hasOrderedMemoryRef())  in areMemAccessesTriviallyDisjoint()
1221     if (isDS(*MIb))  in areMemAccessesTriviallyDisjoint()
1222       return checkInstOffsetsDoNotOverlap(MIa, MIb);  in areMemAccessesTriviallyDisjoint()
1224     return !isFLAT(*MIb);  in areMemAccessesTriviallyDisjoint()
1228     if (isMUBUF(*MIb) || isMTBUF(*MIb))  in areMemAccessesTriviallyDisjoint()
1229       return checkInstOffsetsDoNotOverlap(MIa, MIb);  in areMemAccessesTriviallyDisjoint()
1231     return !isFLAT(*MIb) && !isSMRD(*MIb);  in areMemAccessesTriviallyDisjoint()
1235     if (isSMRD(*MIb))  in areMemAccessesTriviallyDisjoint()
1236       return checkInstOffsetsDoNotOverlap(MIa, MIb);  in areMemAccessesTriviallyDisjoint()
1238     return !isFLAT(*MIb) && !isMUBUF(*MIa) && !isMTBUF(*MIa);  in areMemAccessesTriviallyDisjoint()
1242     if (isFLAT(*MIb))  in areMemAccessesTriviallyDisjoint()
1243       return checkInstOffsetsDoNotOverlap(MIa, MIb);  in areMemAccessesTriviallyDisjoint()