Lines Matching refs:NewOpc
2825 unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vmulls) in LowerINTRINSIC_WO_CHAIN() local
2827 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
2832 unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vminnm) in LowerINTRINSIC_WO_CHAIN() local
2834 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
2841 unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vminu) in LowerINTRINSIC_WO_CHAIN() local
2843 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
2850 unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vmins) in LowerINTRINSIC_WO_CHAIN() local
2852 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
2855 unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vmins) in LowerINTRINSIC_WO_CHAIN() local
2857 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
6360 unsigned NewOpc = 0; in LowerMUL() local
6365 NewOpc = ARMISD::VMULLs; in LowerMUL()
6370 NewOpc = ARMISD::VMULLu; in LowerMUL()
6375 NewOpc = ARMISD::VMULLs; in LowerMUL()
6378 NewOpc = ARMISD::VMULLu; in LowerMUL()
6382 NewOpc = ARMISD::VMULLu; in LowerMUL()
6387 if (!NewOpc) { in LowerMUL()
6406 return DAG.getNode(NewOpc, DL, VT, Op0, Op1); in LowerMUL()
6421 DAG.getNode(NewOpc, DL, VT, in LowerMUL()
6423 DAG.getNode(NewOpc, DL, VT, in LowerMUL()
7909 unsigned NewOpc = MI->getOpcode() == ARM::STRi_preidx ? in EmitInstrWithCustomInserter() local
7919 BuildMI(*BB, MI, dl, TII->get(NewOpc)) in EmitInstrWithCustomInserter()
7933 unsigned NewOpc; in EmitInstrWithCustomInserter() local
7936 case ARM::STRr_preidx: NewOpc = ARM::STR_PRE_REG; break; in EmitInstrWithCustomInserter()
7937 case ARM::STRBr_preidx: NewOpc = ARM::STRB_PRE_REG; break; in EmitInstrWithCustomInserter()
7938 case ARM::STRH_preidx: NewOpc = ARM::STRH_PRE; break; in EmitInstrWithCustomInserter()
7940 MachineInstrBuilder MIB = BuildMI(*BB, MI, dl, TII->get(NewOpc)); in EmitInstrWithCustomInserter()
8184 unsigned NewOpc = convertAddSubFlagsOpcode(MI->getOpcode()); in AdjustInstrPostInstrSelection() local
8185 if (NewOpc) { in AdjustInstrPostInstrSelection()
8187 MCID = &TII->get(NewOpc); in AdjustInstrPostInstrSelection()
8202 assert(!NewOpc && "Optional cc_out operand required"); in AdjustInstrPostInstrSelection()
8221 assert(!NewOpc && "Optional cc_out operand required"); in AdjustInstrPostInstrSelection()
9513 unsigned NewOpc = 0; in CombineBaseUpdate() local
9519 case Intrinsic::arm_neon_vld1: NewOpc = ARMISD::VLD1_UPD; in CombineBaseUpdate()
9521 case Intrinsic::arm_neon_vld2: NewOpc = ARMISD::VLD2_UPD; in CombineBaseUpdate()
9523 case Intrinsic::arm_neon_vld3: NewOpc = ARMISD::VLD3_UPD; in CombineBaseUpdate()
9525 case Intrinsic::arm_neon_vld4: NewOpc = ARMISD::VLD4_UPD; in CombineBaseUpdate()
9527 case Intrinsic::arm_neon_vld2lane: NewOpc = ARMISD::VLD2LN_UPD; in CombineBaseUpdate()
9529 case Intrinsic::arm_neon_vld3lane: NewOpc = ARMISD::VLD3LN_UPD; in CombineBaseUpdate()
9531 case Intrinsic::arm_neon_vld4lane: NewOpc = ARMISD::VLD4LN_UPD; in CombineBaseUpdate()
9533 case Intrinsic::arm_neon_vst1: NewOpc = ARMISD::VST1_UPD; in CombineBaseUpdate()
9535 case Intrinsic::arm_neon_vst2: NewOpc = ARMISD::VST2_UPD; in CombineBaseUpdate()
9537 case Intrinsic::arm_neon_vst3: NewOpc = ARMISD::VST3_UPD; in CombineBaseUpdate()
9539 case Intrinsic::arm_neon_vst4: NewOpc = ARMISD::VST4_UPD; in CombineBaseUpdate()
9541 case Intrinsic::arm_neon_vst2lane: NewOpc = ARMISD::VST2LN_UPD; in CombineBaseUpdate()
9543 case Intrinsic::arm_neon_vst3lane: NewOpc = ARMISD::VST3LN_UPD; in CombineBaseUpdate()
9545 case Intrinsic::arm_neon_vst4lane: NewOpc = ARMISD::VST4LN_UPD; in CombineBaseUpdate()
9552 case ARMISD::VLD2DUP: NewOpc = ARMISD::VLD2DUP_UPD; NumVecs = 2; break; in CombineBaseUpdate()
9553 case ARMISD::VLD3DUP: NewOpc = ARMISD::VLD3DUP_UPD; NumVecs = 3; break; in CombineBaseUpdate()
9554 case ARMISD::VLD4DUP: NewOpc = ARMISD::VLD4DUP_UPD; NumVecs = 4; break; in CombineBaseUpdate()
9555 case ISD::LOAD: NewOpc = ARMISD::VLD1_UPD; in CombineBaseUpdate()
9557 case ISD::STORE: NewOpc = ARMISD::VST1_UPD; in CombineBaseUpdate()
9666 SDValue UpdN = DAG.getMemIntrinsicNode(NewOpc, dl, SDTys, in CombineBaseUpdate()
9715 unsigned NewOpc = 0; in CombineVLDDUP() local
9719 NewOpc = ARMISD::VLD2DUP; in CombineVLDDUP()
9722 NewOpc = ARMISD::VLD3DUP; in CombineVLDDUP()
9725 NewOpc = ARMISD::VLD4DUP; in CombineVLDDUP()
9754 SDValue VLDDup = DAG.getMemIntrinsicNode(NewOpc, SDLoc(VLD), SDTys, in CombineVLDDUP()