Lines Matching refs:BitTracker
160 static bool isEqual(const BitTracker::RegisterCell &RC1, uint16_t B1,
161 const BitTracker::RegisterCell &RC2, uint16_t B2, uint16_t W);
162 static bool isConst(const BitTracker::RegisterCell &RC, uint16_t B,
164 static bool isZero(const BitTracker::RegisterCell &RC, uint16_t B,
166 static bool getConst(const BitTracker::RegisterCell &RC, uint16_t B,
170 static bool getSubregMask(const BitTracker::RegisterRef &RR,
177 BitTracker::RegisterRef &SL, BitTracker::RegisterRef &SH);
185 const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI);
186 static bool isTransparentCopy(const BitTracker::RegisterRef &RD,
187 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI);
271 bool HexagonBitSimplify::isEqual(const BitTracker::RegisterCell &RC1, in isEqual()
272 uint16_t B1, const BitTracker::RegisterCell &RC2, uint16_t B2, in isEqual()
276 if (RC1[B1+i].Type == BitTracker::BitValue::Ref && RC1[B1+i].RefI.Reg == 0) in isEqual()
279 if (RC2[B2+i].Type == BitTracker::BitValue::Ref && RC2[B2+i].RefI.Reg == 0) in isEqual()
288 bool HexagonBitSimplify::isConst(const BitTracker::RegisterCell &RC, in isConst()
298 bool HexagonBitSimplify::isZero(const BitTracker::RegisterCell &RC, in isZero()
308 bool HexagonBitSimplify::getConst(const BitTracker::RegisterCell &RC, in getConst()
313 const BitTracker::BitValue &BV = RC[i-1]; in getConst()
377 bool HexagonBitSimplify::getSubregMask(const BitTracker::RegisterRef &RR, in getSubregMask()
404 BitTracker::RegisterRef &SL, BitTracker::RegisterRef &SH) { in parseRegSequence()
864 const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI) { in getFinalVRegClass()
888 bool HexagonBitSimplify::isTransparentCopy(const BitTracker::RegisterRef &RD, in isTransparentCopy()
889 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI) { in isTransparentCopy()
1009 RedundantInstrElimination(BitTracker &bt, const HexagonInstrInfo &hii, in RedundantInstrElimination()
1021 bool usedBitsEqual(BitTracker::RegisterRef RD, BitTracker::RegisterRef RS);
1025 BitTracker &BT;
1169 BitTracker::RegisterRef UR = *I; in computeUsedBits()
1215 BitTracker::RegisterRef RR = MI.getOperand(OpN); in computeUsedBits()
1233 bool RedundantInstrElimination::usedBitsEqual(BitTracker::RegisterRef RD, in usedBitsEqual()
1234 BitTracker::RegisterRef RS) { in usedBitsEqual()
1235 const BitTracker::RegisterCell &DC = BT.lookup(RD.Reg); in usedBitsEqual()
1236 const BitTracker::RegisterCell &SC = BT.lookup(RS.Reg); in usedBitsEqual()
1274 BitTracker::RegisterRef RD = MI->getOperand(0); in processBlock()
1277 const BitTracker::RegisterCell &DC = BT.lookup(RD.Reg); in processBlock()
1283 BitTracker::RegisterRef RS = Op; in processBlock()
1293 const BitTracker::RegisterCell &SC = BT.lookup(RS.Reg); in processBlock()
1304 BT.put(BitTracker::RegisterRef(NewR), SC); in processBlock()
1322 ConstGeneration(BitTracker &bt, const HexagonInstrInfo &hii, in ConstGeneration()
1334 BitTracker &BT;
1341 const BitTracker::RegisterCell &RC = BT.lookup(R); in isConst()
1344 const BitTracker::BitValue &V = RC[i-1]; in isConst()
1466 CopyGeneration(BitTracker &bt, const HexagonInstrInfo &hii, in CopyGeneration()
1471 bool findMatch(const BitTracker::RegisterRef &Inp,
1472 BitTracker::RegisterRef &Out, const RegisterSet &AVs);
1476 BitTracker &BT;
1496 bool CopyGeneration::findMatch(const BitTracker::RegisterRef &Inp, in findMatch()
1497 BitTracker::RegisterRef &Out, const RegisterSet &AVs) { in findMatch()
1500 const BitTracker::RegisterCell &InpRC = BT.lookup(Inp.Reg); in findMatch()
1508 const BitTracker::RegisterCell &RC = BT.lookup(R); in findMatch()
1557 BitTracker::RegisterRef MR; in processBlock()
1566 BT.put(BitTracker::RegisterRef(NewR), BT.get(MR)); in processBlock()
1594 BitTracker::RegisterRef RD = MI.getOperand(0); in propagateRegCopy()
1601 BitTracker::RegisterRef RS = MI.getOperand(1); in propagateRegCopy()
1611 BitTracker::RegisterRef SL, SH; in propagateRegCopy()
1621 BitTracker::RegisterRef RH = MI.getOperand(1), RL = MI.getOperand(2); in propagateRegCopy()
1633 BitTracker::RegisterRef RS = MI.getOperand(SrcX); in propagateRegCopy()
1668 BitSimplification(BitTracker &bt, const HexagonInstrInfo &hii, in BitSimplification()
1673 struct RegHalf : public BitTracker::RegisterRef {
1677 bool matchHalf(unsigned SelfR, const BitTracker::RegisterCell &RC,
1680 bool matchPackhl(unsigned SelfR, const BitTracker::RegisterCell &RC,
1681 BitTracker::RegisterRef &Rs, BitTracker::RegisterRef &Rt);
1686 bool genPackhl(MachineInstr *MI, BitTracker::RegisterRef RD,
1687 const BitTracker::RegisterCell &RC);
1688 bool genExtractHalf(MachineInstr *MI, BitTracker::RegisterRef RD,
1689 const BitTracker::RegisterCell &RC);
1690 bool genCombineHalf(MachineInstr *MI, BitTracker::RegisterRef RD,
1691 const BitTracker::RegisterCell &RC);
1692 bool genExtractLow(MachineInstr *MI, BitTracker::RegisterRef RD,
1693 const BitTracker::RegisterCell &RC);
1694 bool simplifyTstbit(MachineInstr *MI, BitTracker::RegisterRef RD,
1695 const BitTracker::RegisterCell &RC);
1699 BitTracker &BT;
1708 const BitTracker::RegisterCell &RC, unsigned B, RegHalf &RH) { in matchHalf()
1736 const BitTracker::RegisterCell &SC = BT.lookup(Reg); in matchHalf()
1741 const BitTracker::BitValue &RV = RC[i+B]; in matchHalf()
1742 if (RV.Type == BitTracker::BitValue::Ref) { in matchHalf()
1789 const BitTracker::RegisterCell &RC, BitTracker::RegisterRef &Rs, in matchPackhl()
1790 BitTracker::RegisterRef &Rt) { in matchPackhl()
1827 BitTracker::RegisterRef RS = ValOp; in genStoreUpperHalf()
1830 const BitTracker::RegisterCell &RC = BT.lookup(RS.Reg); in genStoreUpperHalf()
1871 BitTracker::RegisterRef RS = MI->getOperand(2); in genStoreImmediate()
1874 const BitTracker::RegisterCell &RC = BT.lookup(RS.Reg); in genStoreImmediate()
1917 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genPackhl()
1921 BitTracker::RegisterRef Rs, Rt; in genPackhl()
1932 BT.put(BitTracker::RegisterRef(NewR), RC); in genPackhl()
1940 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genExtractHalf()
1967 BT.put(BitTracker::RegisterRef(NewR), RC); in genExtractHalf()
1975 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genCombineHalf()
1996 BT.put(BitTracker::RegisterRef(NewR), RC); in genCombineHalf()
2004 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genExtractLow()
2035 BitTracker::RegisterRef RS = Op; in genExtractLow()
2038 const BitTracker::RegisterCell &SC = BT.lookup(RS.Reg); in genExtractLow()
2053 BT.put(BitTracker::RegisterRef(NewR), RC); in genExtractLow()
2067 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in simplifyTstbit()
2073 BitTracker::RegisterRef RS = MI->getOperand(1); in simplifyTstbit()
2080 const BitTracker::RegisterCell &SC = BT.lookup(RS.Reg); in simplifyTstbit()
2081 const BitTracker::BitValue &V = SC[F+BN]; in simplifyTstbit()
2082 if (V.Type == BitTracker::BitValue::Ref && V.RefI.Reg != RS.Reg) { in simplifyTstbit()
2088 BitTracker::RegisterRef RR(V.RefI.Reg, 0); in simplifyTstbit()
2147 BitTracker::RegisterRef RD = Op0; in processBlock()
2151 const BitTracker::RegisterCell &RC = BT.lookup(RD.Reg); in processBlock()
2189 BitTracker BT(HE, MF); in runOnMachineFunction()
2312 BitTracker *BTP;
2321 BitTracker::RegisterRef Inp, Out;
2327 BitTracker::RegisterRef LR, PR;
2379 const BitTracker::RegisterCell &RC = BTP->lookup(Reg); in isConst()
2381 const BitTracker::BitValue &V = RC[i]; in isConst()
2436 const BitTracker::RegisterCell &OutC = BTP->lookup(OutR); in isShuffleOf()
2438 const BitTracker::BitValue &V = OutC[i]; in isShuffleOf()
2439 if (V.Type != BitTracker::BitValue::Ref) in isShuffleOf()
2452 const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1); in isSameShuffle()
2453 const BitTracker::RegisterCell &OutC2 = BTP->lookup(OutR2); in isSameShuffle()
2459 const BitTracker::BitValue &V1 = OutC1[i], &V2 = OutC2[i]; in isSameShuffle()
2460 if (V1.Type != V2.Type || V1.Type == BitTracker::BitValue::One) in isSameShuffle()
2462 if (V1.Type != BitTracker::BitValue::Ref) in isSameShuffle()
2725 BitTracker BT(HE, MF); in runOnMachineFunction()