Lines Matching refs:mnemonic
128 class T_ALU32_3op_not<string mnemonic, bits<3> MajOp, bits<3> MinOp,
130 : T_ALU32_3op<mnemonic, MajOp, MinOp, OpsRev, 0> {
131 let AsmString = "$Rd = "#mnemonic#"($Rs, ~$Rt)";
164 class T_CMP_rrbh<string mnemonic, bits<3> MinOp, bit IsComm>
166 "$Pd = "#mnemonic#"($Rs, $Rt)", [], "", S_3op_tc_2early_SLOT23>,
169 let CextOpcode = mnemonic;
208 class T_CMP_ribh<string mnemonic, bits<2> MajOp, bit IsHalf, bit IsComm,
211 "$Pd = "#mnemonic#"($Rs, #$Imm)", [], "", ALU64_tc_2early_SLOT23>,
214 let CextOpcode = mnemonic;
244 class T_RCMP_EQ_ri<string mnemonic, bit IsNeg>
246 "$Rd = "#mnemonic#"($Rs, #$s8)", [], "", ALU32_2op_tc_1_SLOT0123>,
396 class T_LD_abs_set<string mnemonic, RegisterClass RC, bits<4>MajOp>:
399 "$dst1 = "#mnemonic#"($dst2 = #$addr)",
448 class T_LoadAbsReg <string mnemonic, string CextOp, RegisterClass RC,
451 "$dst = "#mnemonic#"($src1<<#$src2 + #$src3)",
538 class T_load_rr <string mnemonic, RegisterClass RC, bits<3> MajOp>:
540 "$dst = "#mnemonic#"($src1 + $src2<<#$u2)",
563 class T_pload_rr <string mnemonic, RegisterClass RC, bits<3> MajOp,
568 ") ")#"$dst = "#mnemonic#"($src2+$src3<<#$u2)",
598 multiclass ld_idxd_shl <string mnemonic, string CextOp, RegisterClass RC,
603 def L4_#NAME#_rr : T_load_rr <mnemonic, RC, MajOp>;
606 def L4_p#NAME#t_rr : T_pload_rr <mnemonic, RC, MajOp, 0, 0>;
607 def L4_p#NAME#f_rr : T_pload_rr <mnemonic, RC, MajOp, 1, 0>;
610 def L4_p#NAME#tnew_rr : T_pload_rr <mnemonic, RC, MajOp, 0, 1>;
611 def L4_p#NAME#fnew_rr : T_pload_rr <mnemonic, RC, MajOp, 1, 1>;
688 class T_ST_absset <string mnemonic, string BaseOp, RegisterClass RC,
692 mnemonic#"($dst = #$addr) = $src"#!if(isHalf, ".h","")>, NewValueRel {
700 let isNVStorable = !if (!eq(mnemonic, "memd"), 0, !if(isHalf,0,1));
727 class T_ST_absset_nv <string mnemonic, string BaseOp, bits<2> MajOp,
731 mnemonic#"($dst = #$addr) = $src.new">, NewValueRel {
757 class T_StoreAbsReg <string mnemonic, string CextOp, RegisterClass RC,
761 mnemonic#"($src1<<#$src2 + #$src3) = $src4"#!if(isHalf, ".h",""),
774 let isNVStorable = !if (!eq(mnemonic, "memd"), 0, !if(isHalf,0,1));
822 class T_StoreAbsRegNV <string mnemonic, string CextOp, bits<2> MajOp,
826 mnemonic#"($src1<<#$src2 + #$src3) = $src4.new">, NewValueRel {
856 class T_store_rr <string mnemonic, RegisterClass RC, bits<3> MajOp, bit isH>
858 mnemonic#"($Rs + $Ru<<#$u2) = $Rt"#!if(isH, ".h",""),
867 let isNVStorable = !if (!eq(mnemonic, "memd"), 0, !if(isH,0,1));
885 class T_pstore_rr <string mnemonic, RegisterClass RC, bits<3> MajOp,
891 ") ")#mnemonic#"($Rs+$Ru<<#$u2) = $Rt"#!if(isH, ".h",""),
902 let isNVStorable = !if (!eq(mnemonic, "memd"), 0, !if(isH,0,1));
923 class T_store_new_rr <string mnemonic, bits<2> MajOp> :
925 mnemonic#"($Rs + $Ru<<#$u2) = $Nt.new",
949 class T_pstore_new_rr <string mnemonic, bits<2> MajOp, bit isNot, bit isPredNew>
953 ") ")#mnemonic#"($Rs+$Ru<<#$u2) = $Nt.new",
983 multiclass ST_Idxd_shl<string mnemonic, string CextOp, RegisterClass RC,
986 def S4_#NAME#_rr : T_store_rr <mnemonic, RC, MajOp, isH>;
989 def S4_p#NAME#t_rr : T_pstore_rr <mnemonic, RC, MajOp, 0, 0, isH>;
990 def S4_p#NAME#f_rr : T_pstore_rr <mnemonic, RC, MajOp, 1, 0, isH>;
993 def S4_p#NAME#tnew_rr : T_pstore_rr <mnemonic, RC, MajOp, 0, 1, isH>;
994 def S4_p#NAME#fnew_rr : T_pstore_rr <mnemonic, RC, MajOp, 1, 1, isH>;
1003 multiclass ST_Idxd_shl_nv <string mnemonic, string CextOp, RegisterClass RC,
1006 def S4_#NAME#new_rr : T_store_new_rr<mnemonic, MajOp>;
1009 def S4_p#NAME#newt_rr : T_pstore_new_rr <mnemonic, MajOp, 0, 0>;
1010 def S4_p#NAME#newf_rr : T_pstore_new_rr <mnemonic, MajOp, 1, 0>;
1013 def S4_p#NAME#newtnew_rr : T_pstore_new_rr <mnemonic, MajOp, 0, 1>;
1014 def S4_p#NAME#newfnew_rr : T_pstore_new_rr <mnemonic, MajOp, 1, 1>;
1066 class T_StoreImm <string mnemonic, Operand OffsetOp, bits<2> MajOp >
1068 mnemonic#"($Rs+#$offset)=#$S8",
1093 class T_StoreImm_pred <string mnemonic, Operand OffsetOp, bits<2> MajOp,
1098 ") ")#mnemonic#"($Rs+#$offset)=#$S6",
1135 multiclass ST_Imm_Pred <string mnemonic, Operand OffsetOp, bits<2> MajOp,
1137 def _io : T_StoreImm_pred <mnemonic, OffsetOp, MajOp, PredNot, 0>;
1139 def new_io : T_StoreImm_pred <mnemonic, OffsetOp, MajOp, PredNot, 1>;
1142 multiclass ST_Imm <string mnemonic, string CextOp, Operand OffsetOp,
1145 def _io : T_StoreImm <mnemonic, OffsetOp, MajOp>;
1147 defm t : ST_Imm_Pred <mnemonic, OffsetOp, MajOp, 0>;
1148 defm f : ST_Imm_Pred <mnemonic, OffsetOp, MajOp, 1>;
1259 class T_store_io_nv <string mnemonic, RegisterClass RC,
1263 mnemonic#"($src1+#$src2) = $src3.new",
1270 let opExtentBits = !if (!eq(mnemonic, "memb"), 11,
1271 !if (!eq(mnemonic, "memh"), 12,
1272 !if (!eq(mnemonic, "memw"), 13, 0)));
1274 let opExtentAlign = !if (!eq(mnemonic, "memb"), 0,
1275 !if (!eq(mnemonic, "memh"), 1,
1276 !if (!eq(mnemonic, "memw"), 2, 0)));
1278 let offsetBits = !if (!eq(mnemonic, "memb"), src2{10-0},
1279 !if (!eq(mnemonic, "memh"), src2{11-1},
1280 !if (!eq(mnemonic, "memw"), src2{12-2}, 0)));
1295 class T_pstore_io_nv <string mnemonic, RegisterClass RC, Operand predImmOp,
1300 ") ")#mnemonic#"($src2+#$src3) = $src4.new",
1310 let opExtentBits = !if (!eq(mnemonic, "memb"), 6,
1311 !if (!eq(mnemonic, "memh"), 7,
1312 !if (!eq(mnemonic, "memw"), 8, 0)));
1314 let opExtentAlign = !if (!eq(mnemonic, "memb"), 0,
1315 !if (!eq(mnemonic, "memh"), 1,
1316 !if (!eq(mnemonic, "memw"), 2, 0)));
1318 let offsetBits = !if (!eq(mnemonic, "memb"), src3{5-0},
1319 !if (!eq(mnemonic, "memh"), src3{6-1},
1320 !if (!eq(mnemonic, "memw"), src3{7-2}, 0)));
1341 multiclass ST_Idxd_nv<string mnemonic, string CextOp, RegisterClass RC,
1345 def S2_#NAME#new_io : T_store_io_nv <mnemonic, RC, ImmOp, MajOp>;
1347 def S2_p#NAME#newt_io :T_pstore_io_nv <mnemonic, RC, predImmOp, MajOp, 0, 0>;
1348 def S2_p#NAME#newf_io :T_pstore_io_nv <mnemonic, RC, predImmOp, MajOp, 1, 0>;
1350 def S4_p#NAME#newtnew_io :T_pstore_io_nv <mnemonic, RC, predImmOp,
1352 def S4_p#NAME#newfnew_io :T_pstore_io_nv <mnemonic, RC, predImmOp,
1381 class T_loadalign_pr <string mnemonic, bits<4> MajOp, MemAccessSize AccessSz>
1384 "$dst = "#mnemonic#"($src2++$src3)", [],
1411 class T_StorePI_nv <string mnemonic, Operand ImmOp, bits<2> MajOp >
1414 mnemonic#"($src1++#$offset) = $src2.new",
1444 class T_StorePI_nv_pred <string mnemonic, Operand ImmOp,
1450 ") ")#mnemonic#"($src2++#$offset) = $src3.new",
1479 multiclass ST_PostInc_Pred_nv<string mnemonic, Operand ImmOp,
1481 def _pi : T_StorePI_nv_pred <mnemonic, ImmOp, MajOp, PredNot, 0>;
1484 def new_pi : T_StorePI_nv_pred <mnemonic, ImmOp, MajOp, PredNot, 1>;
1487 multiclass ST_PostInc_nv<string mnemonic, string BaseOp, Operand ImmOp,
1490 def S2_#NAME#_pi : T_StorePI_nv <mnemonic, ImmOp, MajOp>;
1493 defm S2_p#NAME#t : ST_PostInc_Pred_nv <mnemonic, ImmOp, MajOp, 0>;
1494 defm S2_p#NAME#f : ST_PostInc_Pred_nv <mnemonic, ImmOp, MajOp, 1>;
1511 class T_StorePI_RegNV <string mnemonic, bits<2> MajOp, MemAccessSize AccessSz>
1514 #mnemonic#"($src1++$src2) = $src3.new",
1563 class NVJrr_template<string mnemonic, bits<3> majOp, bit NvOpNum,
1567 "if ("#!if(isNegCond, "!","")#mnemonic#
1597 multiclass NVJrr_cond<string mnemonic, bits<3> majOp, bit NvOpNum,
1600 def _nt: NVJrr_template<mnemonic, majOp, NvOpNum, isNegCond, 0>;
1602 def _t : NVJrr_template<mnemonic, majOp, NvOpNum, isNegCond, 1>;
1608 multiclass NVJrr_base<string mnemonic, string BaseOp, bits<3> majOp,
1611 defm _t_jumpnv : NVJrr_cond<mnemonic, majOp, NvOpNum, 0>; // True cond
1612 defm _f_jumpnv : NVJrr_cond<mnemonic, majOp, NvOpNum, 1>; // False cond
1638 class NVJri_template<string mnemonic, bits<3> majOp, bit isNegCond,
1642 "if ("#!if(isNegCond, "!","")#mnemonic#"($src1.new, #$src2)) jump:"
1664 multiclass NVJri_cond<string mnemonic, bits<3> majOp, bit isNegCond> {
1666 def _nt: NVJri_template<mnemonic, majOp, isNegCond, 0>;
1668 def _t : NVJri_template<mnemonic, majOp, isNegCond, 1>;
1671 multiclass NVJri_base<string mnemonic, string BaseOp, bits<3> majOp> {
1673 defm _t_jumpnv : NVJri_cond<mnemonic, majOp, 0>; // True Cond
1674 defm _f_jumpnv : NVJri_cond<mnemonic, majOp, 1>; // False cond
1696 class NVJ_ConstImm_template<string mnemonic, bits<3> majOp, string ImmVal,
1700 "if ("#!if(isNegCond, "!","")#mnemonic
1720 multiclass NVJ_ConstImm_cond<string mnemonic, bits<3> majOp, string ImmVal,
1723 def _nt: NVJ_ConstImm_template<mnemonic, majOp, ImmVal, isNegCond, 0>;
1725 def _t : NVJ_ConstImm_template<mnemonic, majOp, ImmVal, isNegCond, 1>;
1728 multiclass NVJ_ConstImm_base<string mnemonic, string BaseOp, bits<3> majOp,
1731 defm _t_jumpnv : NVJ_ConstImm_cond<mnemonic, majOp, ImmVal, 0>; // True
1732 defm _f_jumpnv : NVJ_ConstImm_cond<mnemonic, majOp, ImmVal, 1>; // False
2243 class T_CompOR <string mnemonic, bits<2> MajOp, SDNode OpNode>
2246 "$Rx |= "#mnemonic#"($Rs, #$s10)",
2653 multiclass T_ShiftOperate<string mnemonic, SDNode Op, bits<2> MajOp,
2655 def _asl_ri : T_S4_ShiftOperate<mnemonic, "asl", Op, shl, 0, MajOp, Itin>;
2656 def _lsr_ri : T_S4_ShiftOperate<mnemonic, "lsr", Op, srl, 1, MajOp, Itin>;
2703 class T_S3op_carry <string mnemonic, bits<3> MajOp>
2706 "$Rdd = "#mnemonic#"($Rss, $Rtt, $Pu):carry",
2727 class T_S3op_6 <string mnemonic, bits<3> MinOp, bit isUnsigned>
2730 "$Rxx = "#mnemonic#"($Rss, $Ru)" ,
3229 class L4_RETURN<string mnemonic, bit isNot, bit isPredNew, bit isTak>
3232 !if(isPredNew, ".new) ", ") ")#mnemonic#
3254 multiclass L4_RETURN_PRED<string mnemonic, bit PredNot> {
3256 def _#NAME# : L4_RETURN <mnemonic, PredNot, 0, 1>;
3257 def _#NAME#new_pnt : L4_RETURN <mnemonic, PredNot, 1, 0>;
3258 def _#NAME#new_pt : L4_RETURN <mnemonic, PredNot, 1, 1>;
3262 multiclass LD_MISC_L4_RETURN<string mnemonic> {
3264 def NAME : LD0Inst <(outs), (ins), mnemonic, [], "",
3272 defm t : L4_RETURN_PRED<mnemonic, 0 >;
3273 defm f : L4_RETURN_PRED<mnemonic, 1 >;
3307 class T_StoreAbsGP <string mnemonic, RegisterClass RC, Operand ImmOp,
3310 mnemonic # "(#$addr) = $src"#!if(isHalf, ".h",""),
3322 let isNVStorable = !if (!eq(mnemonic, "memd"), 0, !if(isHalf,0,1));
3341 class T_StoreAbs_Pred <string mnemonic, RegisterClass RC, bits<2> MajOp,
3345 ") ")#mnemonic#"(#$absaddr) = $src2"#!if(isHalf, ".h",""),
3354 let isNVStorable = !if (!eq(mnemonic, "memd"), 0, !if(isHalf,0,1));
3373 class T_StoreAbs <string mnemonic, RegisterClass RC, Operand ImmOp,
3375 : T_StoreAbsGP <mnemonic, RC, u32MustExt, MajOp, 1, isHalf>,
3393 multiclass ST_Abs<string mnemonic, string CextOp, RegisterClass RC,
3397 def S2_#NAME#abs : T_StoreAbs <mnemonic, RC, ImmOp, MajOp, isHalf>;
3400 def S4_p#NAME#t_abs : T_StoreAbs_Pred<mnemonic, RC, MajOp, isHalf, 0, 0>;
3401 def S4_p#NAME#f_abs : T_StoreAbs_Pred<mnemonic, RC, MajOp, isHalf, 1, 0>;
3404 def S4_p#NAME#tnew_abs : T_StoreAbs_Pred<mnemonic, RC, MajOp, isHalf, 0, 1>;
3405 def S4_p#NAME#fnew_abs : T_StoreAbs_Pred<mnemonic, RC, MajOp, isHalf, 1, 1>;
3415 class T_StoreAbsGP_NV <string mnemonic, Operand ImmOp, bits<2>MajOp, bit isAbs>
3417 mnemonic # !if(isAbs, "(##", "(#")#"$addr) = $src.new",
3446 class T_StoreAbs_NV_Pred <string mnemonic, bits<2> MajOp, bit isNot, bit isNew>
3449 ") ")#mnemonic#"(#$absaddr) = $src2.new",
3476 class T_StoreAbs_NV <string mnemonic, Operand ImmOp, bits<2> MajOp>
3477 : T_StoreAbsGP_NV <mnemonic, ImmOp, MajOp, 1>, AddrModeRel {
3495 multiclass ST_Abs_NV <string mnemonic, string CextOp, Operand ImmOp,
3499 def S2_#NAME#newabs : T_StoreAbs_NV <mnemonic, ImmOp, MajOp>;
3502 def S4_p#NAME#newt_abs : T_StoreAbs_NV_Pred <mnemonic, MajOp, 0, 0>;
3503 def S4_p#NAME#newf_abs : T_StoreAbs_NV_Pred <mnemonic, MajOp, 1, 0>;
3506 def S4_p#NAME#newtnew_abs : T_StoreAbs_NV_Pred <mnemonic, MajOp, 0, 1>;
3507 def S4_p#NAME#newfnew_abs : T_StoreAbs_NV_Pred <mnemonic, MajOp, 1, 1>;
3540 class T_StoreGP <string mnemonic, string BaseOp, RegisterClass RC,
3542 : T_StoreAbsGP <mnemonic, RC, ImmOp, MajOp, 0, isHalf> {
3550 multiclass ST_GP <string mnemonic, string BaseOp, Operand ImmOp,
3556 def NAME#gp : T_StoreAbsGP <mnemonic, IntRegs, ImmOp, MajOp,
3559 def NAME#newgp : T_StoreAbsGP_NV <mnemonic, ImmOp, MajOp, 0> ;
3618 class T_LoadAbsGP <string mnemonic, RegisterClass RC, Operand ImmOp,
3621 "$dst = "#mnemonic# "(#$addr)",
3644 class T_LoadAbs <string mnemonic, RegisterClass RC, Operand ImmOp,
3646 : T_LoadAbsGP <mnemonic, RC, u32MustExt, MajOp>, AddrModeRel {
3666 class T_LoadAbs_Pred <string mnemonic, RegisterClass RC, bits<3> MajOp,
3670 ") ")#"$dst = "#mnemonic#"(#$absaddr)">, AddrModeRel {
3696 multiclass LD_Abs_Pred<string mnemonic, RegisterClass RC, bits<3> MajOp,
3698 def _abs : T_LoadAbs_Pred <mnemonic, RC, MajOp, PredNot, 0>;
3700 def new_abs : T_LoadAbs_Pred <mnemonic, RC, MajOp, PredNot, 1>;
3704 multiclass LD_Abs<string mnemonic, string CextOp, RegisterClass RC,
3708 def L4_#NAME#_abs: T_LoadAbs <mnemonic, RC, ImmOp, MajOp>;
3711 defm L4_p#NAME#t : LD_Abs_Pred<mnemonic, RC, MajOp, 0>;
3712 defm L4_p#NAME#f : LD_Abs_Pred<mnemonic, RC, MajOp, 1>;
3740 class T_LoadGP <string mnemonic, string BaseOp, RegisterClass RC, Operand ImmOp,
3742 : T_LoadAbsGP <mnemonic, RC, ImmOp, MajOp>, PredNewRel {