Lines Matching refs:ISD
77 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in MSP430TargetLowering()
78 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in MSP430TargetLowering()
81 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
82 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
83 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
84 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in MSP430TargetLowering()
85 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand); in MSP430TargetLowering()
91 setOperationAction(ISD::SRA, MVT::i8, Custom); in MSP430TargetLowering()
92 setOperationAction(ISD::SHL, MVT::i8, Custom); in MSP430TargetLowering()
93 setOperationAction(ISD::SRL, MVT::i8, Custom); in MSP430TargetLowering()
94 setOperationAction(ISD::SRA, MVT::i16, Custom); in MSP430TargetLowering()
95 setOperationAction(ISD::SHL, MVT::i16, Custom); in MSP430TargetLowering()
96 setOperationAction(ISD::SRL, MVT::i16, Custom); in MSP430TargetLowering()
97 setOperationAction(ISD::ROTL, MVT::i8, Expand); in MSP430TargetLowering()
98 setOperationAction(ISD::ROTR, MVT::i8, Expand); in MSP430TargetLowering()
99 setOperationAction(ISD::ROTL, MVT::i16, Expand); in MSP430TargetLowering()
100 setOperationAction(ISD::ROTR, MVT::i16, Expand); in MSP430TargetLowering()
101 setOperationAction(ISD::GlobalAddress, MVT::i16, Custom); in MSP430TargetLowering()
102 setOperationAction(ISD::ExternalSymbol, MVT::i16, Custom); in MSP430TargetLowering()
103 setOperationAction(ISD::BlockAddress, MVT::i16, Custom); in MSP430TargetLowering()
104 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in MSP430TargetLowering()
105 setOperationAction(ISD::BR_CC, MVT::i8, Custom); in MSP430TargetLowering()
106 setOperationAction(ISD::BR_CC, MVT::i16, Custom); in MSP430TargetLowering()
107 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in MSP430TargetLowering()
108 setOperationAction(ISD::SETCC, MVT::i8, Custom); in MSP430TargetLowering()
109 setOperationAction(ISD::SETCC, MVT::i16, Custom); in MSP430TargetLowering()
110 setOperationAction(ISD::SELECT, MVT::i8, Expand); in MSP430TargetLowering()
111 setOperationAction(ISD::SELECT, MVT::i16, Expand); in MSP430TargetLowering()
112 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom); in MSP430TargetLowering()
113 setOperationAction(ISD::SELECT_CC, MVT::i16, Custom); in MSP430TargetLowering()
114 setOperationAction(ISD::SIGN_EXTEND, MVT::i16, Custom); in MSP430TargetLowering()
115 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i8, Expand); in MSP430TargetLowering()
116 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i16, Expand); in MSP430TargetLowering()
118 setOperationAction(ISD::CTTZ, MVT::i8, Expand); in MSP430TargetLowering()
119 setOperationAction(ISD::CTTZ, MVT::i16, Expand); in MSP430TargetLowering()
120 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i8, Expand); in MSP430TargetLowering()
121 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i16, Expand); in MSP430TargetLowering()
122 setOperationAction(ISD::CTLZ, MVT::i8, Expand); in MSP430TargetLowering()
123 setOperationAction(ISD::CTLZ, MVT::i16, Expand); in MSP430TargetLowering()
124 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i8, Expand); in MSP430TargetLowering()
125 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i16, Expand); in MSP430TargetLowering()
126 setOperationAction(ISD::CTPOP, MVT::i8, Expand); in MSP430TargetLowering()
127 setOperationAction(ISD::CTPOP, MVT::i16, Expand); in MSP430TargetLowering()
129 setOperationAction(ISD::SHL_PARTS, MVT::i8, Expand); in MSP430TargetLowering()
130 setOperationAction(ISD::SHL_PARTS, MVT::i16, Expand); in MSP430TargetLowering()
131 setOperationAction(ISD::SRL_PARTS, MVT::i8, Expand); in MSP430TargetLowering()
132 setOperationAction(ISD::SRL_PARTS, MVT::i16, Expand); in MSP430TargetLowering()
133 setOperationAction(ISD::SRA_PARTS, MVT::i8, Expand); in MSP430TargetLowering()
134 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expand); in MSP430TargetLowering()
136 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); in MSP430TargetLowering()
139 setOperationAction(ISD::MUL, MVT::i8, Expand); in MSP430TargetLowering()
140 setOperationAction(ISD::MULHS, MVT::i8, Expand); in MSP430TargetLowering()
141 setOperationAction(ISD::MULHU, MVT::i8, Expand); in MSP430TargetLowering()
142 setOperationAction(ISD::SMUL_LOHI, MVT::i8, Expand); in MSP430TargetLowering()
143 setOperationAction(ISD::UMUL_LOHI, MVT::i8, Expand); in MSP430TargetLowering()
144 setOperationAction(ISD::MUL, MVT::i16, Expand); in MSP430TargetLowering()
145 setOperationAction(ISD::MULHS, MVT::i16, Expand); in MSP430TargetLowering()
146 setOperationAction(ISD::MULHU, MVT::i16, Expand); in MSP430TargetLowering()
147 setOperationAction(ISD::SMUL_LOHI, MVT::i16, Expand); in MSP430TargetLowering()
148 setOperationAction(ISD::UMUL_LOHI, MVT::i16, Expand); in MSP430TargetLowering()
150 setOperationAction(ISD::UDIV, MVT::i8, Expand); in MSP430TargetLowering()
151 setOperationAction(ISD::UDIVREM, MVT::i8, Expand); in MSP430TargetLowering()
152 setOperationAction(ISD::UREM, MVT::i8, Expand); in MSP430TargetLowering()
153 setOperationAction(ISD::SDIV, MVT::i8, Expand); in MSP430TargetLowering()
154 setOperationAction(ISD::SDIVREM, MVT::i8, Expand); in MSP430TargetLowering()
155 setOperationAction(ISD::SREM, MVT::i8, Expand); in MSP430TargetLowering()
156 setOperationAction(ISD::UDIV, MVT::i16, Expand); in MSP430TargetLowering()
157 setOperationAction(ISD::UDIVREM, MVT::i16, Expand); in MSP430TargetLowering()
158 setOperationAction(ISD::UREM, MVT::i16, Expand); in MSP430TargetLowering()
159 setOperationAction(ISD::SDIV, MVT::i16, Expand); in MSP430TargetLowering()
160 setOperationAction(ISD::SDIVREM, MVT::i16, Expand); in MSP430TargetLowering()
161 setOperationAction(ISD::SREM, MVT::i16, Expand); in MSP430TargetLowering()
164 setOperationAction(ISD::VASTART, MVT::Other, Custom); in MSP430TargetLowering()
165 setOperationAction(ISD::VAARG, MVT::Other, Expand); in MSP430TargetLowering()
166 setOperationAction(ISD::VAEND, MVT::Other, Expand); in MSP430TargetLowering()
167 setOperationAction(ISD::VACOPY, MVT::Other, Expand); in MSP430TargetLowering()
168 setOperationAction(ISD::JumpTable, MVT::i16, Custom); in MSP430TargetLowering()
186 case ISD::SHL: // FALLTHROUGH in LowerOperation()
187 case ISD::SRL: in LowerOperation()
188 case ISD::SRA: return LowerShifts(Op, DAG); in LowerOperation()
189 case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); in LowerOperation()
190 case ISD::BlockAddress: return LowerBlockAddress(Op, DAG); in LowerOperation()
191 case ISD::ExternalSymbol: return LowerExternalSymbol(Op, DAG); in LowerOperation()
192 case ISD::SETCC: return LowerSETCC(Op, DAG); in LowerOperation()
193 case ISD::BR_CC: return LowerBR_CC(Op, DAG); in LowerOperation()
194 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); in LowerOperation()
195 case ISD::SIGN_EXTEND: return LowerSIGN_EXTEND(Op, DAG); in LowerOperation()
196 case ISD::RETURNADDR: return LowerRETURNADDR(Op, DAG); in LowerOperation()
197 case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG); in LowerOperation()
198 case ISD::VASTART: return LowerVASTART(Op, DAG); in LowerOperation()
199 case ISD::JumpTable: return LowerJumpTable(Op, DAG); in LowerOperation()
265 const SmallVectorImpl<ISD::OutputArg> &Outs) { in AnalyzeVarArgs()
270 const SmallVectorImpl<ISD::InputArg> &Ins) { in AnalyzeVarArgs()
301 ISD::ArgFlagsTy ArgFlags = Args[ValNo].Flags; in AnalyzeArguments()
345 const SmallVectorImpl<ISD::InputArg> &Ins) { in AnalyzeRetResult()
350 const SmallVectorImpl<ISD::OutputArg> &Outs) { in AnalyzeRetResult()
369 const SmallVectorImpl<ISD::InputArg> in LowerFormalArguments()
394 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall()
396 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall()
425 const SmallVectorImpl<ISD::InputArg> in LowerCCCArguments()
471 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerCCCArguments()
474 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerCCCArguments()
478 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerCCCArguments()
487 ISD::ArgFlagsTy Flags = Ins[i].Flags; in LowerCCCArguments()
523 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
577 const SmallVectorImpl<ISD::OutputArg> in LowerCCCCallTo()
580 const SmallVectorImpl<ISD::InputArg> &Ins, in LowerCCCCallTo()
611 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
614 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
617 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
632 DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, in LowerCCCCallTo()
636 ISD::ArgFlagsTy Flags = Outs[i].Flags; in LowerCCCCallTo()
659 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains); in LowerCCCCallTo()
714 const SmallVectorImpl<ISD::InputArg> &Ins, in LowerCallResult()
747 case ISD::SHL: in LowerShifts()
750 case ISD::SRA: in LowerShifts()
753 case ISD::SRL: in LowerShifts()
765 if (Opc == ISD::SRL && ShiftAmount) { in LowerShifts()
773 Victim = DAG.getNode((Opc == ISD::SHL ? MSP430ISD::RLA : MSP430ISD::RRA), in LowerShifts()
811 ISD::CondCode CC, in EmitCMP()
820 case ISD::SETEQ: in EmitCMP()
824 if (LHS.getOpcode() == ISD::Constant) in EmitCMP()
827 case ISD::SETNE: in EmitCMP()
831 if (LHS.getOpcode() == ISD::Constant) in EmitCMP()
834 case ISD::SETULE: in EmitCMP()
836 case ISD::SETUGE: in EmitCMP()
847 case ISD::SETUGT: in EmitCMP()
849 case ISD::SETULT: in EmitCMP()
860 case ISD::SETLE: in EmitCMP()
862 case ISD::SETGE: in EmitCMP()
873 case ISD::SETGT: in EmitCMP()
875 case ISD::SETLT: in EmitCMP()
895 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get(); in LowerBR_CC()
921 (LHS.getOpcode() == ISD::AND || in LowerSETCC()
922 (LHS.getOpcode() == ISD::TRUNCATE && in LowerSETCC()
923 LHS.getOperand(0).getOpcode() == ISD::AND))) { in LowerSETCC()
927 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); in LowerSETCC()
971 SR = DAG.getNode(ISD::SRA, dl, MVT::i16, SR, One); in LowerSETCC()
972 SR = DAG.getNode(ISD::AND, dl, MVT::i16, SR, One); in LowerSETCC()
974 SR = DAG.getNode(ISD::XOR, dl, MVT::i16, SR, One); in LowerSETCC()
990 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get(); in LowerSELECT_CC()
1010 return DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, VT, in LowerSIGN_EXTEND()
1011 DAG.getNode(ISD::ANY_EXTEND, dl, VT, Val), in LowerSIGN_EXTEND()
1050 DAG.getNode(ISD::ADD, dl, PtrVT, FrameAddr, Offset), in LowerRETURNADDR()
1108 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
1112 if (LD->getExtensionType() != ISD::NON_EXTLOAD) in getPostIndexedAddressParts()
1119 if (Op->getOpcode() != ISD::ADD) in getPostIndexedAddressParts()
1130 AM = ISD::POST_INC; in getPostIndexedAddressParts()