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Lines Matching refs:opstr

178 class CompactBranchMM<string opstr, DAGOperand opnd, PatFrag cond_op,
181 !strconcat(opstr, "\t$rs, $offset"), [], II_BCCZC, FrmI> {
189 class LoadLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
192 !strconcat(opstr, "\t$rt, $addr"),
199 class StoreLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
202 !strconcat(opstr, "\t$rt, $addr"),
222 class MovePMM16<string opstr, RegisterOperand RO> :
224 !strconcat(opstr, "\t$dst_regs, $rs, $rt"), [],
243 class StorePairMM<string opstr, InstrItinClass Itin = NoItinerary,
246 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI, opstr> {
251 class LoadPairMM<string opstr, InstrItinClass Itin = NoItinerary,
254 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI, opstr> {
259 class LLBaseMM<string opstr, RegisterOperand RO> :
261 !strconcat(opstr, "\t$rt, $addr"), [], NoItinerary, FrmI> {
266 class LLEBaseMM<string opstr, RegisterOperand RO> :
268 !strconcat(opstr, "\t$rt, $addr"), [], NoItinerary, FrmI> {
273 class SCBaseMM<string opstr, RegisterOperand RO> :
275 !strconcat(opstr, "\t$rt, $addr"), [], NoItinerary, FrmI> {
281 class SCEBaseMM<string opstr, RegisterOperand RO> :
283 !strconcat(opstr, "\t$rt, $addr"), [], NoItinerary, FrmI> {
289 class LoadMM<string opstr, DAGOperand RO, SDPatternOperator OpNode = null_frag,
292 !strconcat(opstr, "\t$rt, $addr"),
299 class ArithRMM16<string opstr, RegisterOperand RO, bit isComm = 0,
303 !strconcat(opstr, "\t$rd, $rs, $rt"),
308 class AndImmMM16<string opstr, RegisterOperand RO,
311 !strconcat(opstr, "\t$rd, $rs, $imm"), [], Itin, FrmI>;
313 class LogicRMM16<string opstr, RegisterOperand RO,
317 !strconcat(opstr, "\t$rt, $rs"),
323 class NotMM16<string opstr, RegisterOperand RO> :
325 !strconcat(opstr, "\t$rt, $rs"),
328 class ShiftIMM16<string opstr, Operand ImmOpnd, RegisterOperand RO,
331 !strconcat(opstr, "\t$rd, $rt, $shamt"), [], Itin, FrmR>;
333 class LoadMM16<string opstr, DAGOperand RO, SDPatternOperator OpNode,
336 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI> {
342 class StoreMM16<string opstr, DAGOperand RTOpnd, DAGOperand RO,
346 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI> {
351 class LoadSPMM16<string opstr, DAGOperand RO, InstrItinClass Itin,
354 !strconcat(opstr, "\t$rt, $offset"), [], Itin, FrmI> {
360 class StoreSPMM16<string opstr, DAGOperand RO, InstrItinClass Itin,
363 !strconcat(opstr, "\t$rt, $offset"), [], Itin, FrmI> {
368 class LoadGPMM16<string opstr, DAGOperand RO, InstrItinClass Itin,
371 !strconcat(opstr, "\t$rt, $offset"), [], Itin, FrmI> {
377 class AddImmUR2<string opstr, RegisterOperand RO> :
379 !strconcat(opstr, "\t$rd, $rs, $imm"),
384 class AddImmUS5<string opstr, RegisterOperand RO> :
386 !strconcat(opstr, "\t$rd, $imm"), [], NoItinerary, FrmR> {
390 class AddImmUR1SP<string opstr, RegisterOperand RO> :
392 !strconcat(opstr, "\t$rd, $imm"), [], NoItinerary, FrmR>;
394 class AddImmUSP<string opstr> :
396 !strconcat(opstr, "\t$imm"), [], NoItinerary, FrmI>;
398 class MoveFromHILOMM<string opstr, RegisterOperand RO, Register UseReg> :
399 MicroMipsInst16<(outs RO:$rd), (ins), !strconcat(opstr, "\t$rd"),
405 class MoveMM16<string opstr, RegisterOperand RO, bit isComm = 0,
408 !strconcat(opstr, "\t$rd, $rs"), [], Itin, FrmR> {
413 class LoadImmMM16<string opstr, Operand Od, RegisterOperand RO> :
415 !strconcat(opstr, "\t$rd, $imm"), [], NoItinerary, FrmI> {
420 class JumpLinkRegMM16<string opstr, RegisterOperand RO> :
421 MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
429 class JumpRegMM16<string opstr, RegisterOperand RO> :
430 MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
448 class JumpLinkRegSMM16<string opstr, RegisterOperand RO> :
449 MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
457 class JumpRegCMM16<string opstr, RegisterOperand RO> :
458 MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
467 class BrkSdbbp16MM<string opstr> :
469 !strconcat(opstr, "\t$code_"),
472 class CBranchZeroMM<string opstr, DAGOperand opnd, RegisterOperand RO> :
474 !strconcat(opstr, "\t$rs, $offset"), [], II_BCCZ, FrmI> {
483 class JumpLinkMM<string opstr, DAGOperand opnd> :
484 InstSE<(outs), (ins opnd:$target), !strconcat(opstr, "\t$target"),
485 [], II_JALS, FrmJ, opstr> {
489 class JumpLinkRegMM<string opstr, RegisterOperand RO>:
490 InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
493 class BranchCompareToZeroLinkMM<string opstr, DAGOperand opnd,
496 !strconcat(opstr, "\t$rs, $offset"), [], II_BCCZALS, FrmI, opstr>;
499 class LoadWordIndexedScaledMM<string opstr, RegisterOperand RO,
503 !strconcat(opstr, "\t$rd, ${index}(${base})"), [], Itin, FrmFI>;
505 class PrefetchIndexed<string opstr> :
507 !strconcat(opstr, "\t$hint, ${index}(${base})"), [], NoItinerary, FrmOther>;
509 class AddImmUPC<string opstr, RegisterOperand RO> :
511 !strconcat(opstr, "\t$rs, $imm"), [], NoItinerary, FrmR>;
540 class StoreMultMM<string opstr,
543 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI, opstr> {
548 class LoadMultMM<string opstr,
551 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI, opstr> {
556 class StoreMultMM16<string opstr,
560 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI> {
565 class LoadMultMM16<string opstr,
569 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI> {
574 class UncondBranchMM16<string opstr> :
576 !strconcat(opstr, "\t$offset"),
658 class WaitMM<string opstr> :
659 InstSE<(outs), (ins uimm10:$code_), !strconcat(opstr, "\t$code_"), [],
660 NoItinerary, FrmOther, opstr>;
1008 class UncondBranchMMPseudo<string opstr> :
1010 !strconcat(opstr, "\t$offset")>;