Lines Matching refs:SrcVT
126 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
127 bool emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg,
130 bool emitIntZExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg);
132 bool emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg);
133 bool emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT,
135 bool emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT,
939 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in selectFPExt() local
942 if (SrcVT != MVT::f32 || DestVT != MVT::f64) in selectFPExt()
1013 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in selectFPTrunc() local
1016 if (SrcVT != MVT::f64 || DestVT != MVT::f32) in selectFPTrunc()
1036 MVT DstVT, SrcVT; in selectFPToInt() local
1049 if (!isTypeLegal(SrcTy, SrcVT)) in selectFPToInt()
1052 if (SrcVT != MVT::f32 && SrcVT != MVT::f64) in selectFPToInt()
1063 unsigned Opc = (SrcVT == MVT::f32) ? Mips::TRUNC_W_S : Mips::TRUNC_W_D32; in selectFPToInt()
1141 MVT SrcVT = ArgVT; in processCallArgs() local
1142 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false); in processCallArgs()
1149 MVT SrcVT = ArgVT; in processCallArgs() local
1150 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true); in processCallArgs()
1517 EVT SrcVT, DestVT; in selectTrunc() local
1518 SrcVT = TLI.getValueType(DL, Op->getType(), true); in selectTrunc()
1521 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8) in selectTrunc()
1553 MVT SrcVT = SrcEVT.getSimpleVT(); in selectIntExt() local
1557 if (!emitIntExt(SrcVT, SrcReg, DestVT, ResultReg, isZExt)) in selectIntExt()
1562 bool MipsFastISel::emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT, in emitIntSExt32r1() argument
1565 switch (SrcVT.SimpleTy) { in emitIntSExt32r1()
1581 bool MipsFastISel::emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT, in emitIntSExt32r2() argument
1583 switch (SrcVT.SimpleTy) { in emitIntSExt32r2()
1596 bool MipsFastISel::emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, in emitIntSExt() argument
1601 return emitIntSExt32r2(SrcVT, SrcReg, DestVT, DestReg); in emitIntSExt()
1602 return emitIntSExt32r1(SrcVT, SrcReg, DestVT, DestReg); in emitIntSExt()
1605 bool MipsFastISel::emitIntZExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, in emitIntZExt() argument
1609 switch (SrcVT.SimpleTy) { in emitIntZExt()
1627 bool MipsFastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, in emitIntExt() argument
1634 ((SrcVT != MVT::i1) && (SrcVT != MVT::i8) && (SrcVT != MVT::i16))) in emitIntExt()
1637 return emitIntZExt(SrcVT, SrcReg, DestVT, DestReg); in emitIntExt()
1638 return emitIntSExt(SrcVT, SrcReg, DestVT, DestReg); in emitIntExt()
1641 unsigned MipsFastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, in emitIntExt() argument
1644 bool Success = emitIntExt(SrcVT, SrcReg, DestVT, DestReg, isZExt); in emitIntExt()