Lines Matching refs:opstr
784 class ArithLogicR<string opstr, RegisterOperand RO, bit isComm = 0,
788 !strconcat(opstr, "\t$rd, $rs, $rt"),
789 [(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR, opstr> {
796 class ArithLogicI<string opstr, Operand Od, RegisterOperand RO,
801 !strconcat(opstr, "\t$rt, $rs, $imm16"),
803 Itin, FrmI, opstr> {
809 class MArithR<string opstr, InstrItinClass itin, bit isComm = 0> :
811 !strconcat(opstr, "\t$rs, $rt"), [], itin, FrmR, opstr> {
818 class LogicNOR<string opstr, RegisterOperand RO>:
820 !strconcat(opstr, "\t$rd, $rs, $rt"),
821 [(set RO:$rd, (not (or RO:$rs, RO:$rt)))], II_NOR, FrmR, opstr> {
826 class shift_rotate_imm<string opstr, Operand ImmOpnd,
831 !strconcat(opstr, "\t$rd, $rt, $shamt"),
832 [(set RO:$rd, (OpNode RO:$rt, PF:$shamt))], itin, FrmR, opstr> {
836 class shift_rotate_reg<string opstr, RegisterOperand RO, InstrItinClass itin,
839 !strconcat(opstr, "\t$rd, $rt, $rs"),
841 opstr>;
844 class LoadUpper<string opstr, RegisterOperand RO, Operand Imm>:
845 InstSE<(outs RO:$rt), (ins Imm:$imm16), !strconcat(opstr, "\t$rt, $imm16"),
846 [], II_LUI, FrmI, opstr>, IsAsCheapAsAMove {
852 class Load<string opstr, DAGOperand RO, SDPatternOperator OpNode = null_frag,
854 InstSE<(outs RO:$rt), (ins mem:$addr), !strconcat(opstr, "\t$rt, $addr"),
855 [(set RO:$rt, (OpNode Addr:$addr))], Itin, FrmI, opstr> {
861 class StoreMemory<string opstr, DAGOperand RO, DAGOperand MO,
864 InstSE<(outs), (ins RO:$rt, MO:$addr), !strconcat(opstr, "\t$rt, $addr"),
865 [(OpNode RO:$rt, Addr:$addr)], Itin, FrmI, opstr> {
870 class Store<string opstr, DAGOperand RO, SDPatternOperator OpNode = null_frag,
872 StoreMemory<opstr, RO, mem, OpNode, Itin, Addr>;
876 class LoadLeftRight<string opstr, SDNode OpNode, RegisterOperand RO,
879 !strconcat(opstr, "\t$rt, $addr"),
885 class StoreLeftRight<string opstr, SDNode OpNode, RegisterOperand RO,
887 InstSE<(outs), (ins RO:$rt, mem:$addr), !strconcat(opstr, "\t$rt, $addr"),
893 class LW_FT2<string opstr, RegisterOperand RC, InstrItinClass Itin,
895 InstSE<(outs RC:$rt), (ins mem:$addr), !strconcat(opstr, "\t$rt, $addr"),
896 [(set RC:$rt, (OpNode addrDefault:$addr))], Itin, FrmFI, opstr> {
901 class SW_FT2<string opstr, RegisterOperand RC, InstrItinClass Itin,
903 InstSE<(outs), (ins RC:$rt, mem:$addr), !strconcat(opstr, "\t$rt, $addr"),
904 [(OpNode RC:$rt, addrDefault:$addr)], Itin, FrmFI, opstr> {
910 class LW_FT3<string opstr, RegisterOperand RC, InstrItinClass Itin,
912 InstSE<(outs RC:$rt), (ins mem:$addr), !strconcat(opstr, "\t$rt, $addr"),
913 [(set RC:$rt, (OpNode addrDefault:$addr))], Itin, FrmFI, opstr> {
918 class SW_FT3<string opstr, RegisterOperand RC, InstrItinClass Itin,
920 InstSE<(outs), (ins RC:$rt, mem:$addr), !strconcat(opstr, "\t$rt, $addr"),
921 [(OpNode RC:$rt, addrDefault:$addr)], Itin, FrmFI, opstr> {
927 class CBranch<string opstr, DAGOperand opnd, PatFrag cond_op,
930 !strconcat(opstr, "\t$rs, $rt, $offset"),
932 FrmI, opstr> {
939 class CBranchZero<string opstr, DAGOperand opnd, PatFrag cond_op,
942 !strconcat(opstr, "\t$rs, $offset"),
944 FrmI, opstr> {
952 class SetCC_R<string opstr, PatFrag cond_op, RegisterOperand RO> :
954 !strconcat(opstr, "\t$rd, $rs, $rt"),
956 II_SLT_SLTU, FrmR, opstr>;
958 class SetCC_I<string opstr, PatFrag cond_op, Operand Od, PatLeaf imm_type,
961 !strconcat(opstr, "\t$rt, $rs, $imm16"),
963 II_SLTI_SLTIU, FrmI, opstr>;
966 class JumpFJ<DAGOperand opnd, string opstr, SDPatternOperator operator,
968 InstSE<(outs), (ins opnd:$target), !strconcat(opstr, "\t$target"),
991 class JumpFR<string opstr, RegisterOperand RO,
994 FrmR, opstr>;
997 class IndirectBranch<string opstr, RegisterOperand RO> : JumpFR<opstr, RO> {
1004 class JumpLink<string opstr, DAGOperand opnd> :
1005 InstSE<(outs), (ins opnd:$target), !strconcat(opstr, "\t$target"),
1006 [(MipsJmpLink imm:$target)], II_JAL, FrmJ, opstr> {
1015 class JumpLinkReg<string opstr, RegisterOperand RO>:
1016 InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
1017 [], II_JALR, FrmR, opstr>;
1019 class BGEZAL_FT<string opstr, DAGOperand opnd,
1022 !strconcat(opstr, "\t$rs, $offset"), [], II_BCCZAL, FrmI, opstr> {
1051 class SYS_FT<string opstr> :
1053 !strconcat(opstr, "\t$code_"), [], NoItinerary, FrmI, opstr>;
1055 class BRK_FT<string opstr> :
1057 !strconcat(opstr, "\t$code_1, $code_2"), [], NoItinerary,
1058 FrmOther, opstr>;
1061 class ER_FT<string opstr> :
1063 opstr, [], NoItinerary, FrmOther, opstr>;
1066 class DEI_FT<string opstr, RegisterOperand RO> :
1068 !strconcat(opstr, "\t$rt"), [], NoItinerary, FrmOther, opstr>;
1071 class WAIT_FT<string opstr> :
1072 InstSE<(outs), (ins), opstr, [], NoItinerary, FrmOther, opstr>;
1076 class SYNC_FT<string opstr> :
1078 NoItinerary, FrmOther, opstr>;
1080 class SYNCI_FT<string opstr> :
1081 InstSE<(outs), (ins mem_simm16:$addr), !strconcat(opstr, "\t$addr"), [],
1082 NoItinerary, FrmOther, opstr> {
1088 class TEQ_FT<string opstr, RegisterOperand RO> :
1090 !strconcat(opstr, "\t$rs, $rt, $code_"), [], NoItinerary,
1091 FrmI, opstr>;
1093 class TEQI_FT<string opstr, RegisterOperand RO> :
1095 !strconcat(opstr, "\t$rs, $imm16"), [], NoItinerary, FrmOther, opstr>;
1097 class Mult<string opstr, InstrItinClass itin, RegisterOperand RO,
1099 InstSE<(outs), (ins RO:$rs, RO:$rt), !strconcat(opstr, "\t$rs, $rt"), [],
1100 itin, FrmR, opstr> {
1133 class Div<string opstr, InstrItinClass itin, RegisterOperand RO,
1135 InstSE<(outs), (ins RO:$rs, RO:$rt), !strconcat(opstr, "\t$$zero, $rs, $rt"),
1136 [], itin, FrmR, opstr> {
1145 class MoveFromLOHI<string opstr, RegisterOperand RO, Register UseReg>:
1146 InstSE<(outs RO:$rd), (ins), !strconcat(opstr, "\t$rd"), [], II_MFHI_MFLO,
1147 FrmR, opstr> {
1157 class MoveToLOHI<string opstr, RegisterOperand RO, list<Register> DefRegs>:
1158 InstSE<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"), [], II_MTHI_MTLO,
1159 FrmR, opstr> {
1164 class EffectiveAddress<string opstr, RegisterOperand RO> :
1165 InstSE<(outs RO:$rt), (ins mem_ea:$addr), !strconcat(opstr, "\t$rt, $addr"),
1167 !strconcat(opstr, "_lea")> {
1173 class CountLeading0<string opstr, RegisterOperand RO>:
1174 InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
1175 [(set RO:$rd, (ctlz RO:$rs))], II_CLZ, FrmR, opstr>;
1177 class CountLeading1<string opstr, RegisterOperand RO>:
1178 InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
1179 [(set RO:$rd, (ctlz (not RO:$rs)))], II_CLO, FrmR, opstr>;
1182 class SignExtInReg<string opstr, ValueType vt, RegisterOperand RO,
1184 InstSE<(outs RO:$rd), (ins RO:$rt), !strconcat(opstr, "\t$rd, $rt"),
1185 [(set RO:$rd, (sext_inreg RO:$rt, vt))], itin, FrmR, opstr>;
1188 class SubwordSwap<string opstr, RegisterOperand RO,
1190 InstSE<(outs RO:$rd), (ins RO:$rt), !strconcat(opstr, "\t$rd, $rt"), [], itin,
1191 FrmR, opstr> {
1201 class ExtBase<string opstr, RegisterOperand RO, Operand PosOpnd,
1204 !strconcat(opstr, " $rt, $rs, $pos, $size"),
1206 FrmR, opstr>, ISA_MIPS32R2;
1208 class InsBase<string opstr, RegisterOperand RO, Operand PosOpnd,
1211 !strconcat(opstr, " $rt, $rs, $pos, $size"),
1213 II_INS, FrmR, opstr>, ISA_MIPS32R2 {
1227 class LLBase<string opstr, RegisterOperand RO> :
1228 InstSE<(outs RO:$rt), (ins mem:$addr), !strconcat(opstr, "\t$rt, $addr"),
1234 class SCBase<string opstr, RegisterOperand RO> :
1236 !strconcat(opstr, "\t$rt, $addr"), [], NoItinerary, FrmI> {