Lines Matching refs:MO
93 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
156 const MCOperand &MO = MI.getOperand(OpNo); in getDirectBrEncoding() local
157 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
160 Fixups.push_back(MCFixup::create(0, MO.getExpr(), in getDirectBrEncoding()
168 const MCOperand &MO = MI.getOperand(OpNo); in getCondBrEncoding() local
169 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding()
172 Fixups.push_back(MCFixup::create(0, MO.getExpr(), in getCondBrEncoding()
181 const MCOperand &MO = MI.getOperand(OpNo); in getAbsDirectBrEncoding() local
182 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding()
185 Fixups.push_back(MCFixup::create(0, MO.getExpr(), in getAbsDirectBrEncoding()
194 const MCOperand &MO = MI.getOperand(OpNo); in getAbsCondBrEncoding() local
195 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding()
198 Fixups.push_back(MCFixup::create(0, MO.getExpr(), in getAbsCondBrEncoding()
206 const MCOperand &MO = MI.getOperand(OpNo); in getImm16Encoding() local
207 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getImm16Encoding()
210 Fixups.push_back(MCFixup::create(IsLittleEndian? 0 : 2, MO.getExpr(), in getImm16Encoding()
223 const MCOperand &MO = MI.getOperand(OpNo); in getMemRIEncoding() local
224 if (MO.isImm()) in getMemRIEncoding()
225 return (getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF) | RegBits; in getMemRIEncoding()
228 Fixups.push_back(MCFixup::create(IsLittleEndian? 0 : 2, MO.getExpr(), in getMemRIEncoding()
242 const MCOperand &MO = MI.getOperand(OpNo); in getMemRIXEncoding() local
243 if (MO.isImm()) in getMemRIXEncoding()
244 return ((getMachineOpValue(MI, MO, Fixups, STI) >> 2) & 0x3FFF) | RegBits; in getMemRIXEncoding()
247 Fixups.push_back(MCFixup::create(IsLittleEndian? 0 : 2, MO.getExpr(), in getMemRIXEncoding()
262 const MCOperand &MO = MI.getOperand(OpNo); in getSPE8DisEncoding() local
263 assert(MO.isImm()); in getSPE8DisEncoding()
264 uint32_t Imm = getMachineOpValue(MI, MO, Fixups, STI) >> 3; in getSPE8DisEncoding()
278 const MCOperand &MO = MI.getOperand(OpNo); in getSPE4DisEncoding() local
279 assert(MO.isImm()); in getSPE4DisEncoding()
280 uint32_t Imm = getMachineOpValue(MI, MO, Fixups, STI) >> 2; in getSPE4DisEncoding()
294 const MCOperand &MO = MI.getOperand(OpNo); in getSPE2DisEncoding() local
295 assert(MO.isImm()); in getSPE2DisEncoding()
296 uint32_t Imm = getMachineOpValue(MI, MO, Fixups, STI) >> 1; in getSPE2DisEncoding()
304 const MCOperand &MO = MI.getOperand(OpNo); in getTLSRegEncoding() local
305 if (MO.isReg()) return getMachineOpValue(MI, MO, Fixups, STI); in getTLSRegEncoding()
310 Fixups.push_back(MCFixup::create(0, MO.getExpr(), in getTLSRegEncoding()
323 const MCOperand &MO = MI.getOperand(OpNo+1); in getTLSCallEncoding() local
324 Fixups.push_back(MCFixup::create(0, MO.getExpr(), in getTLSCallEncoding()
333 const MCOperand &MO = MI.getOperand(OpNo); in get_crbitm_encoding() local
336 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)); in get_crbitm_encoding()
337 return 0x80 >> CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in get_crbitm_encoding()
342 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() argument
345 if (MO.isReg()) { in getMachineOpValue()
350 MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7); in getMachineOpValue()
351 return CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
354 assert(MO.isImm() && in getMachineOpValue()
356 return MO.getImm(); in getMachineOpValue()